lc74772v Sanyo Semiconductor Corporation, lc74772v Datasheet
lc74772v
Available stocks
Related parts for lc74772v
lc74772v Summary of contents
Page 1
... Ordering number : EN5159B Overview The LC74772V is a CMOS LSI that implements on-screen display for camcorders. It displays characters and patterns in a camcorder viewfinder under microprocessor control. The LC74772V displays a 12 characters. Features • Screen format: 12 lines 24 characters (up to 288 characters) • Number of characters displayed 288 characters • ...
Page 2
... W (CS (CS) Data setup time t SU (SIN (CS) Data hold time t h (SIN) t word One-word write time t wt LC74772V Conditions V DD CTRL1, TEST , CS, SCLK, SIN, OUT , HSYNC, IN MOD VSYNC, RST CTRL1, TEST , CS, SCLK, SIN, OUT , HSYNC, IN MOD VSYNC, RST OSC ...
Page 3
... Serial Data Input Timing Pin Assignment The signal names in parentheses indicate the output pin functions when 4-system output mode is used. LC74772V No. 5159-3/17 ...
Page 4
... DD Note: 1. Built-in pull-up resistors can be specified for inclusion in the CS (pin 6), SCLK (pin 7), SIN (pin 8), and RST (pin 23) pins as mask options clock input mode (when CTRL1 is high), the function that holds the OSC LC74772V Description Ground connection Connections for the coil and capacitor that form the oscillator that generates the character output horizontal dot clock ...
Page 5
... Block Diagram LC74772V No. 5159-5/17 ...
Page 6
... Note the CS pin is set high, the command state is set to the command 0 (system control setup) state system reset is executed from the RST pin command reset, the command register is set tot 0. LC74772V First byte Data ...
Page 7
... The oscillator stop command is only executed when display is off not executed if display is in progress. • In external clock input mode, this command stops the acquisition of that clock signal. 4. TSTMOD: The test mode command is executed if the TEST by applications in normal operation. LC74772V Register content Function Command 0 identification code ...
Page 8
... FMT 1 0 ATR 0 FMT 1 Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 1 identification code HSYNC (pin 22) functions as the horizontal synchronizing signal input HSYNC (pin 22) functions as the composite synchronizing signal input The system clock has a positive polarity ...
Page 9
... BLK1 BLK0 1 Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 3 identification code System 4 functions as a normal character and border outputs. System 4 functions as general-purpose ports. The pin 11 output is set to low. ...
Page 10
... DSP 1 GSG 1 0 DSP 0 BSG 1 Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 5 identification code System 4 output off System 4 output on System 3 output off System 3 output on System 2 output off System 2 output on ...
Page 11
... BKO2 BKO1 BKO1 Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 8 identification code — BKCR BKCG BKCB Background color Black Blue 0 1 ...
Page 12
... HP2 HP1 HP0 1 Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 9 identification code the vertical display start position then 16H Where H is horizontal period pulse period. ...
Page 13
... LIN Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 10 identification code — Sets the character size. — Sets the system 4 display line. — Sets the system 3 display line. ...
Page 14
... HADR Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 11 identification code The range of the display RAM vertical address (line address) setting is from (hexadecimal) (12 lines). Values of C (hexadecimal) or larger are not allowed. ...
Page 15
... Note: This register is set reset (either by the RST pin command reset). LC74772V Register content Function Command 14 identification code — Blinking character specification — Reverse video character specification — R output specification (system 3 output in 4-system output mode) — ...
Page 16
... The display memory address consists of a line address (VADR0, VADR1, VADR2, and VADR3 representing values from (hexadecimal)), and a column (character position) address (HADR0, HADR1, HADR2, HADR3, and HADR4 representing values from (hexadecimal)). Display Screen Organization (Display memory address) LC74772V No. 5159-16/17 ...
Page 17
... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of February, 1999. Specifications and information herein are subject to change without notice. LC74772V PS No. 5159-17/17 ...