A40MX02-PL208A ACTEL [Actel Corporation], A40MX02-PL208A Datasheet - Page 46
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A40MX02-PL208A
Manufacturer Part Number
A40MX02-PL208A
Description
40MX and 42MX Automotive FPGA Families
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A40MX02-PL208A.pdf
(78 pages)
- Current page: 46 of 78
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Table 1-14 • A42MX36 Timing Characteristics (Nominal 5.0V Operation)
Worst-Case Automotive Conditions, V
1 -4 2
Parameter
t
t
t
t
t
t
Asynchronous SRAM Operations
t
t
t
t
t
t
t
t
t
Input Module Propagation Delays
t
t
t
t
t
Input Module Predicted Routing Delays
t
t
t
t
t
Notes:
1. For dual-module macros, use t
2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating
3. Data applies to macros based on the S-module. Timing parameters for sequential macros constructed from C-modules can be
4. Setup and hold timing parameters for the Input Buffer Latch are defined with respect to the PAD and the D input. External setup/
5. Delays based on 35 pF loading.
RENSU
RENH
WENSU
WENH
BENS
BENH
RPD
RDADV
ADSU
ADH
RENSUA
RENHA
WENSU
WENH
DOH
INPY
INGO
INH
INSU
ILA
IRD1
IRD2
IRD3
IRD4
IRD8
40MX and 42MX Automotive FPGA Families
device performance. Post-route timing analysis or simulation is required to determine actual performance.
obtained from the Timer tool.
hold timing parameters must account for delay from an external PAD signal to the G inputs. Delay from an external PAD signal to
the G input subtracts (adds) to the internal setup (hold) time.
Read Enable Set-Up
Read Enable Hold
Write Enable Set-Up
Write Enable Hold
Block Enable Set-Up
Block Enable Hold
Asynchronous Access Time
Read Address Valid
Address/Data Set-Up Time
Address/Data Hold Time
Read Enable Set-Up to Address Valid
Read Enable Hold
Write Enable Set-Up
Write Enable Hold
Data Out Hold Time
Input Data Pad-to-Y
Input Latch Gate-to-Output
Input Latch Hold
Input Latch Set-Up
Latch Active Pulse Width
FO=1 Routing Delay
FO=2 Routing Delay
FO=3 Routing Delay
FO=4 Routing Delay
FO=8 Routing Delay
PD1
+ t
RD1
CCA
2
+ t
= 4.75V, T
Description
PDn
, t
CO
+ t
J
= 125°C (Continued)
RD1
+ t
v3.1
PDn
, or t
PD1
+ t
RD1
+ t
SUD
, whichever is appropriate.
Min.
14.7
4.5
4.6
1.0
4.5
0.8
7.8
1.0
5.7
0.0
0.0
2.7
0.0
5.7
0.0
0.0
Std. Speed
Max.
13.6
2.0
1.7
2.4
3.3
3.8
4.4
5.0
7.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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