IDT70V65 IDT [Integrated Device Technology], IDT70V65 Datasheet - Page 17

• Manufacturer Part Number: IDT70V65
• Description: HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

Waveform of BUSY Arbitration Controlled by CE Timing (M/S = V
Waveform of BUSY Arbitration Cycle Controlled by Address Match
Timing (M/S = V
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If t
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
ADDR
ADDR
INTERRUPT TIMING
t
t
t
t
BUSY
AS
WR
INS
INR
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
ADDR
BUSY
Symbol
and
APS
CE
CE
"A"
"B"
"B"
is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted.
"A"
"B"
"A"
"B"
"B"
Interrupt Set Time
Interrupt Reset Time
Address Set-up Time
Write Recovery Time
IH
t
APS
)
(1)
(2)
Parameter
t
APS
(2)
t
BAA
MATCHING ADDRESS "N"
ADDRESS "N"
t
BAC
ADDRESSES MATCH
17
70V659/58/57S10
Min.
____
____
0
0
Com'l Only
Max.
____
____
10
10
Industrial and Commercial Temperature Ranges
70V659/58/57S12
t
Min.
____
____
t
BDA
0
0
BDC
Com'l
& Ind
Max.
____
____
12
12
70V659/58/57S15
Min.
____
____
0
0
Com'l
& Ind
IH
Max.
____
____
15
15
)
(1)
4869 drw 14
4869 drw 15
4869 tbl 15
Unit
ns
ns
ns
ns