IDT70V65 IDT [Integrated Device Technology], IDT70V65 Datasheet - Page 12

• Manufacturer Part Number: IDT70V65
• Description: HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

BUSY
Waveform of Read Cycles
DATA
NOTES:
1. Timing depends on which signal is asserted last, OE, CE or BEn.
2. Timing depends on which signal is de-asserted first CE, OE or BEn.
3. t
4. Start of valid data depends on which timing becomes effective last t
5. SEM = V
Timing of Power-Up Power-Down
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
has no relation to valid output data.
ADDR
BDD
R/W
BEn
OUT
OUT
CE
OE
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY
(6)
IH
.
CE
I
I
CC
SB
t
t
t
t
t
AA
ACE
AOE
LZ
ABE
(1)
t
(4)
PU
(5)
(4)
(4)
(4)
50%
AOE
t
RC
, t
ACE
, t
12
t
BDD
AA
or t
(3,4)
BDD
.
t
VALID DATA
PD
Industrial and Commercial Temperature Ranges
50%
(4)
4869 drw 07
t
HZ
.
(2)
t
OH
4869 drw 06