IDT70V38L15PFI IDT [Integrated Device Technology], IDT70V38L15PFI Datasheet - Page 12

• Manufacturer Part Number: IDT70V38L15PFI
• Description: HIGH-SPEED 3.3V 64K x 18 DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

ADDR
ADDR
Waveform of BUSY Arbitration Controlled by CE Timing (M/S = V
ADDR
Waveform of BUSY Arbitration Cycle Controlled by Address Match
Timing (M/S = V
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If t
3. Refer to Truth Table I - Chip Enable.
BUSY
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
BUSY
INTERRUPT TIMING
t
t
t
t
AS
WR
INS
INR
IDT70V38L
High-Speed 3.3V 64K x 18 Dual-Port Static RAM
and
Symbol
CE
CE
APS
"A"
"B"
"A"
"B"
"B"
is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted.
"A"
"B"
"B"
Interrupt Set Time
Interrupt Reset Time
Address Set-up Time
Write Recovery Time
t
APS
IH
)
(2)
(1)
t
APS
(2)
t
BAA
MATCHING ADDRESS "N"
Parameter
ADDRESS "N"
t
BAC
ADDRESSES MATCH
12
Industrial and Commercial Temperature Ranges
t
t
Min.
BDC
BDA
____
____
0
0
Com'l Only
70V38L15
Max.
____
____
15
15
Min.
____
____
0
0
70V38L20
Com'l
& Ind
Max.
IH
____
____
20
20
)
(1,3)
4850 drw 13
4850 drw 14
4850 tbl 15
Unit
ns
ns
ns
ns