ADF4110 Analog Devices, ADF4110 Datasheet - Page 5

• Manufacturer Part Number: ADF4110
• Description: Single, Integer-N, 550 MHZ PLL With Programmable Prescaler And Charge Pump
• Manufacturer: Analog Devices

Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
R
CP
CPGND
AGND
RF
RF
AV
REF
DGND
CE
CLK
DATA
LE
MUXOUT
DV
V
SET
P
IN
IN
DD
DD
IN
B
A
CPGND
AGND
RF
RF
REF
AV
R
SET
IN
IN
CP
DD
IN
B
A
Function
Connecting a resistor between this pin and CPGND sets the maximum charge pump output current. The
nominal voltage potential at the R
So, with R
Charge Pump Output. When enabled this provides ±I
external VCO.
Charge Pump Ground. This is the ground return path for the charge pump.
Analog Ground. This is the ground return path of the prescaler.
Complementary Input to the RF Prescaler. This point should be decoupled to the ground plane with
a small bypass capacitor, typically 100 pF. See Figure 3.
Input to the RF Prescaler. This small signal input is ac-coupled from the VCO.
Analog Power Supply. This may range from 2.7 V to 5.5 V. Decoupling capacitors to the analog ground
plane should be placed as close as possible to this pin. AV
Reference Input. This is a CMOS input with a nominal threshold of V
tance of 100 kΩ. See Figure 2. This input can be driven from a TTL or CMOS crystal oscillator or it
can be ac-coupled.
Digital Ground.
Chip Enable. A logic low on this pin powers down the device and puts the charge pump output into three-
state mode. Taking the pin high will power up the device depending on the status of the power-down bit F2.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into
the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This
input is a high impedance CMOS input.
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one
of the four latches, the latch being selected using the control bits.
This multiplexer output allows either the Lock Detect, the scaled RF or the scaled Reference Frequency
to be accessed externally.
Digital Power Supply. This may range from 2.7 V to 5.5 V. Decoupling capacitors to the digital ground
plane should be placed as close as possible to this pin. DV
Charge Pump Power Supply. This should be greater than or equal to V
it can be set to 6 V and used to drive a VCO with a tuning range of up to 6 V.
1
2
3
4
5
6
7
8
(Not to Scale)
TSSOP
ADF4110
ADF4111
ADF4112
ADF4113
TOP VIEW
SET
= 4.7 kΩ, I
16
15
14
13
12
11
10
9
V
DV
MUXOUT
LE
DATA
CLK
CE
DGND
P
DD
PIN FUNCTION DESCRIPTIONS
CPmax
PIN CONFIGURATIONS
= 5 mA.
I
CP
SET
max
pin is 0.56 V. The relationship between I
=
ADF4110/ADF4111/ADF4112/ADF4113
R
23 5
SET
.
CP
to the external loop filter, which in turn drives the
DD
DD
must be the same value as DV
CPGND
must be the same value as AV
AGND
AGND
RF
RF
CHIP SCALE PACKAGE
IN
IN
B
A
1
2
3
4
5
DD
DD
(Not to Scale)
/2 and an equivalent input resis-
ADF4110
ADF4111
ADF4112
ADF4113
TOP VIEW
. In systems where V
CP
and R
15
14
13
12
11
MUXOUT
SET
LE
DATA
CLK
CE
DD
DD
is
.
.
DD
is 3 V,