ADF4110 Analog Devices, ADF4110 Datasheet - Page 19

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ADF4110

Manufacturer Part Number
ADF4110
Description
Single, Integer-N, 550 MHZ PLL With Programmable Prescaler And Charge Pump
Manufacturer
Analog Devices
Datasheet

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APPLICATIONS SECTION
Local Oscillator for GSM Base Station Transmitter
The following diagram shows the ADF4111/ADF4112/ADF4113
being used with a VCO to produce the LO for a GSM base station
transmitter.
The reference input signal is applied to the circuit at FREF
and, in this case, is terminated in 50 Ω. Typical GSM system
would have a 13 MHz TCXO driving the Reference Input
without any 50 Ω termination. In order to have a channel
spacing of 200 kHz (the GSM standard), the reference input
must be divided by 65, using the on-chip reference divider
of the ADF4111/ADF4112/ADF4113.
The charge pump output of the ADF4111/ADF4112/ADF4113
(Pin 2) drives the loop filter. In calculating the loop filter com-
ponent values, a number of items need to be considered. In this
example, the loop filter was designed so that the overall phase
margin for the system would be 45 degrees. Other PLL system
specifications are:
FREF
IN
1000pF 1000pF
51
4.7k
1
8
REF
CE
CLK
DATA
LE
R
AV
7
V
ADF4111
ADF4112
ADF4113
SET
3
DD
DD
IN
15
4
DV
MUXOUT
DD
RF
RF
9
16
V
IN
IN
V
CP
P
P
A
B
14
2
6
5
100pF
1nF
100pF
LOCK
DETECT
DECOUPLING CAPACITORS ON AV
AND ON THE POSITIVE SUPPLY OF THE VCO190-902T HAVE
BEEN OMITTED FROM THE DIAGRAM TO AID CLARITY.
IN
51
5.6k
8.2nF
ADF4110/ADF4111/ADF4112/ADF4113
3.3k
All of these specifications are needed and used to come up with
the loop filter components values shown in Figure 7.
The loop filter output drives the VCO, which, in turn, is fed
back to the RF input of the PLL synthesizer and also drives
the RF Output terminal. A T-circuit configuration provides
50 Ω matching between the VCO output, the RF output and
the RF
In a PLL system, it is important to know when the system is in
lock. In Figure 7, this is accomplished by using the MUXOUT
signal from the synthesizer. The MUXOUT pin can be pro-
grammed to monitor various internal signals in the synthesizer.
One of these is the LD or lock-detect signal.
K
K
Loop Bandwidth = 20 kHz
F
N = 4500
Extra Reference Spur Attenuation = 10 dB
REF
D
V
= 12 MHz/V
= 5 mA
IN
= 200 kHz
620pF
terminal of the synthesizer.
C
VCO190-902T
V
DD
CC
B
, DV
DD
, V
P
OF THE ADF411
P
100pF
100pF
18
X
18
18
RF
OUT

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