MSS2105-1 MOSEL [Mosel Vitelic, Corp], MSS2105-1 Datasheet - Page 4

• Manufacturer Part Number: MSS2105-1
• Description: 21/32/43/60 VOICE ROM
• Manufacturer: MOSEL [Mosel Vitelic, Corp]

Specifications subject to change without notice, contact your sales representatives for the most recent information.
Signals
Cout
This pin can drive speaker through a transistor.
Cout is tristate during standby.
Cout has zero current output when sound data is
zero. Cout has full current output when sound
data is the highest. Cout has half of full current
output when sound is silence at middle data value.
Cout has half of full current output when playing
sound at appended memory-less mute.
The bypass Cout Resistor is used to bypass the
audio output current from Cout. This bypassing
extra current to ground gives a way to prevent the
saturation of audio waveform amplified by
transistor. This Resistance is 470 ohm typically. It
always is not very small. Or user can let it open if
the transistor has a fair beta value.
A transistor with beta value 150 is sufficient for
typical applications. Larger beta value get larger
sound but may have the amplified waveform
saturated.
8 ohm speaker is recommended. The speaker
characeristics and housing impacts the loudness
very much.
Vout1, Vout2
They are tristate during standby state.
These two pins can drive buzzer directly. The
piezo buzzer used should have its resonant
frequency at the center of your sound frequency
domain or you are unable to play your sound good
by this buzzer.
For instance, you have your sound spans over
frequency from 100 Hz through 1 KHz. A buzzer
with resonant frequency at 300 Hz will play this
sound good. A buzzer with resonant frequency at
1 KHz will distort the sound very much because
that most of the energy of the playback sound is
unable to be played by this buzzer.
TG0, TG1, TG2, TG3, TG4, TG5, TG6
These 7 pins have 4 ways to perform.
The lst way (KBD addressing 1):
When user defines less than 11 sentences, a Vss
pulse wider than t T applied to TG0 plays sentence
2, TG1 plays sentence 3,..., TG6 plays sectence 8.
Of course, the fabrication should be masked as
Keyboard addressing.
The 2nd way (KBD addressing 2):
When user defines more than 10 sentences, he
can access the first ten sentences by way 1st. To
access the 11st sentence or higher, these 7 pins
are played as the S-tree. TG6 means 8, TG5
means 7, ..., TG0 means 2.
fabrication should be masked as Keyboard
addressing.
The 3rd way (Matrix addressing ):
To coorperate with TG7 as well as 7 ROWn pins
MOSEL VITELIC INC.
Of course, the
preliminary
4/27
(ROW0 through ROW6), they form an 8x7 matrix
in 56 cross points. The touch of a cross point
activates a trigger signal to play repectively
sentence. Of course, the fabrication should be
masked as matrix addressing.
The 4th way (CPU addressing):
They are 7-bit high-true addresses to specify the
section to be played among 128. TG6 is the MSB
while TG0 is the LSB.
address hold time required, t H. Of course, the
fabrication should be masked as cpu addressing.
TG7
This pin has 4 ways to perform.
The 1st way (KBD addressing 1):
When user defines less than 11 sentences, a Vss
pulse wider than t T applied to TG7 plays sentence
9. Of course, the fabrication should be masked as
Keyboard addressing.
The 2nd way (KBD addressing 2):
When user defines more than 10 sentences, he
can access the first ten sentences by way 1st. To
access the 11st sentence or higher, this TG7
means number 9 of S-tree.
fabrication should be masked as Keyboard
addressing.
The 3rd way (Matrix addressing ):
To coorperate with 7 TGn pins (TG0 through TG6)
as well as 7 ROWn pins (ROW0 through ROW6),
they form an 8x7 matrix in 56 cross points. The
touch of a cross point activates a trigger signal to
play repectively sentence.
fabrication
addressing.
The 4th way (CPU addressing):
Address Strobe.
Its rising edge latches the 7-bit addresses and
starts the playing.
immediately the playing sound, activates (or
keeps) the busy output to be high, activates the
audio output to stay at center value, activates the
LED output. Its width should be wide enough as t
W. Of course, the fabrication should be masked
as cpu addressing.
ROW0, 1, 2, 3, 4, 5, 6
These 7 pins have 3 ways to perform.
The 1st way (KBD addressing 1):
When user defines less than 11 sentences, a Vss
pulse wider than t T applied to ROW6 plays
sentence 1, ROW5 plays sectence 0. Of course,
the fabrication should be masked as KeyBoard
addressing.
The 2nd way (KBD addressing 2):
When user defines more than 10 sentences, of
MSS2105/S3205/S4305/S6605
should
be
Its falling edge stops
They should meet the
masked
Of course, the
Of course, the
as
PID248*** 08/96
matrix