CT2553-FP AEROFLEX [Aeroflex Circuit Technology], CT2553-FP Datasheet - Page 28

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CT2553-FP

Manufacturer Part Number
CT2553-FP
Description
CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
Manufacturer
AEROFLEX [Aeroflex Circuit Technology]
Datasheet
Aeroflex Circuit Technology
MEMENA-OUT
16MHz Clock
(Internal)
MEM/REG
READYD
MEMWR
A15-A00
D15-D00
SELECT
STRBD
RD/WR
SYMBOL
IOEN
tpw1
tpw2
td1
td2
td3
tz
tr
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5µs of IOEN going active. READYD will go away within one clock cycle maximum.
NOTE:
DESCRIPTION
See Note 1
READYD low delay (CPU Handshake)
IOEN high delay (CPU Handshake)
READYD pulse width (CPU Handshake)
CPU MEMWR low delay
CPU MEMWR low pulse width
READYD to STRBD release
(SELECT
Figure 31 – CPU Writes to RAM Timing
tz
STRBD) to IOEN
CPU Writes to Ram
td3
See Note 2
RAM ADDRESS VALID
td1
RAM DATA VALID
28
tpw2
tr
tpw1
MIN
50
70
-
-
-
-
-
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
td2
MAX
1.37
150
120
1.8
20
-
-
UNITS
ns
ns
ns
ns
ns
µs
µs

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