FM24C16C-G RAMTRON [Ramtron International Corporation], FM24C16C-G Datasheet - Page 7
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FM24C16C-G
Manufacturer Part Number
FM24C16C-G
Description
16Kb Serial 5V F-RAM Memory
Manufacturer
RAMTRON [Ramtron International Corporation]
Datasheet
1.FM24C16C-G.pdf
(12 pages)
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Ramtron
Endurance
The FM24C16C internally operates with a read and
restore mechanism. Therefore, endurance cycles are
applied for each read or write cycle. The memory
architecture is based on an array of rows and
columns. Each read or write access causes an
endurance cycle for an entire row. In the FM24C16C,
a row is 64 bits wide. Every 8-byte boundary marks
Rev. 1.1
May 2011
By Master
By F-RAM
Start
By Master
S
By F-RAM
By Master
Slave Address
By F-RAM
Start
S
0
Address
A
Start
Slave Address
S
Address
Word Address
Slave Address
Figure 9. Selective (Random) Read
Figure 7. Current Address Read
Address
Acknowledge
1
Figure 8. Sequential Read
Acknowledge
A
A
Start
S
Acknowledge
1
Data Byte
Slave Address
A
Address
the beginning of a new row. Endurance can be
optimized by ensuring frequently accessed data is
located in different rows. Regardless, FRAM read
and write endurance is effectively unlimited at the
1MHz two-wire speed. Even at 3000 accesses per
second to the same row, 10 years time will elapse
before 1 trillion endurance cycles occur.
Acknowledge
Data Byte
1
A
Data
Data
A
Data Byte
Data Byte
Acknowledge
FM24C16C - 16Kb 5V I2C F-RAM
No
1
Acknowledge
Acknowledge
P
Data
A
No
1 P
Data Byte
Stop
Stop
Acknowledge
Page 7 of 12
No
1 P
Stop