FM24C16A_05 RAMTRON [Ramtron International Corporation], FM24C16A_05 Datasheet - Page 7

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FM24C16A_05

Manufacturer Part Number
FM24C16A_05
Description
16Kb FRAM Serial Memory
Manufacturer
RAMTRON [Ramtron International Corporation]
Datasheet
The operation is now a current address read. This
Endurance
The FM24C16A internally operates with a read and
restore mechanism. Therefore, endurance cycles are
applied for each read or write cycle. The FRAM
architecture is based on an array of rows and
columns. Rows are defined by A10-A3. Each access
causes an endurance cycle for a row. Endurance can
be optimized by ensuring frequently accessed data is
placed in different rows. Regardless, FRAM read and
write endurance is effectively unlimited at the 1MHz
Rev 3.0
Mar. 2005
By FM24C16
By FM24C16
By Master
By Master
Start
S
By FM24C16
By Master
Slave Address
Start
S
Slave Address
0
Start
Address
Address
S
A
Word Address
Slave Address
Acknowledge
Figure 9. Selective (Random) Read
Figure 7. Current Address Read
Address
1
Figure 8. Sequential Read
A
Acknowledge
A
Acknowledge
Start
S
Data Byte
1
A
Slave Address
Address
operation is illustrated in Figure 9.
two-wire speed. Even at 3000 accesses per second to
the same row, 10 years time will elapse before 1
trillion endurance cycles occur.
Acknowledge
Data Byte
Data
A
1
Data
A
Acknowledge
Data Byte
Data Byte
No
1
P
Acknowledge
Acknowledge
Data
A
No
1 P
Stop
Data Byte
FM24C16A
Page 7 of 12
Acknowledge
Stop
No
1 P
Stop

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