A43E26161G-95F AMICC [AMIC Technology], A43E26161G-95F Datasheet - Page 24

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A43E26161G-95F

Manufacturer Part Number
A43E26161G-95F
Description
1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
Manufacturer
AMICC [AMIC Technology]
Datasheet
(December, 2004, Version 1.0)
* Note : 1. All inputs can be don’t care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BS0, BS1.
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command.
4. A10/AP and BS0, BS1 control bank precharge when precharge command is asserted.
A10/AP
A10/AP
BS1
0
0
1
1
0
1
0
0
0
0
1
BS0
BS1
BS1
0
1
0
1
0
0
1
1
0
0
1
1
X
0
0
1
1
BS0
BS0
0
1
0
1
0
1
0
1
X
0
1
0
1
Active & Read/Write
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Disable auto precharge, leave bank C active at end of burst.
Disable auto precharge, leave bank D active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
Enable auto precharge, precharge bank C at end of burst.
Enable auto precharge, precharge bank D at end of burst.
Bank A
Bank B
Bank C
Bank D
23
Precharge
All Banks
Bank C
Bank D
Bank A
Bank B
Operation
AMIC Technology, Corp.
A43E26161

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