h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 16
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h5tq4g43mmr
Manufacturer Part Number
h5tq4g43mmr
Description
4gb Ddr3 Sdram Ddp
Manufacturer
Hynix Semiconductor
Datasheet
1.H5TQ4G43MMR.pdf
(73 pages)
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Rev. 0.1 /Aug 2008
5. AC and DC Input Measurement Levels
5.1 AC and DC Logic Input Levels for Single-Ended Signals
Single Ended AC and DC Input Levels
The dc-tolerance limits and ac-noise limits for the reference voltages VRefCA and VRefDQ are illustrated in
below Figure. It shows a valid reference voltage VRef (t) as a function of time. (VRef stands for VRefCA and
VRefDQ likewise).
VRef (DC) is the linear average of VRef (t) over a very long period of time (e.g. 1 sec). This average has to
meet the min/max requirements in Table 1.
Furthermore VRef (t) may temporarily deviate from VRef (DC) by no more than +/- 1% VDD.
VIH(DC)
VIL(DC)
VIH(AC)
VIL(AC)
V
V
VTT
Notes:
1. For DQ and DM, Vref = VrefDQ. For input any pins except RESET, Vref = VrefCA.
2. The “t.b.d.” entries might change based on overshoot and undershoot specification.
3. The ac peak noise on V
4. For reference: approx. VDD/2 +/- 15 mV.
Symbol
RefDQ(DC)
RefCA(DC)
(for reference: approx. +/- 15 mV).
DC input logic high
DC input logic low
AC input logic high
AC input logic low
Reference Voltage for DQ, DM inputs
Reference Voltage for ADD, CMD inputs
Termination voltage for DQ, DQS outputs
V
Ref(DC)
voltage
Ref
Illustration of Vref (DC) tolerance and Vref ac-noise limits
Parameter
may not allow V
V
Ref
ac-noise
Ref
to deviate from V
VDDQ/2 - TBD
Vref + 0.100
Vref + 0.175
0.49 * VDD
0.49 * VDD
TBD
Min
Ref(DC)
DDR3-1066,
DDR3-1333
by more than +/-1% VDD
V
Ref
VDDQ/2 + TBD
(t)
Vref - 0.100
Vref - 0.175
0.51 * VDD
0.51 * VDD
Max
TBD
-
VDD
VSS
V
V
VDD/2
Ref(DC)max
Ref(DC)min
time
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
Unit
V
V
V
V
V
V
Notes
1, 2
1, 2
3, 4
3, 4
1
1
16
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