ax5042-1 AXSEM, ax5042-1 Datasheet - Page 20

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ax5042-1

Manufacturer Part Number
ax5042-1
Description
Rf Transceiver
Manufacturer
AXSEM
Datasheet

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Circuit Description
5.1.
The on-chip crystal oscillator allows the use of an inexpensive quartz crystal as the RF
generation subsystem’s timing reference. Although a wider range of crystal frequencies can
be handled by the crystal oscillator circuit, it is recommended to use 16 MHz as reference
frequency since this choice allows all the typical SRD band RF frequencies to be generated.
The oscillator circuit is enabled by programming the
oscillator is enabled.
To adjust the circuit’s characteristics to the quartz crystal being used without using additional
external components the transconductance of the crystal oscillator can be programmed.
The transconductance is programmed via register bits XTALOSCGM[3:0] in register XTALOSC.
The recommended method to synchronize the receiver frequency to a carrier signal is to
make use of the high resolution RF frequency generation subsystem together with the
Automatic Frequency Control, both are described further down.
Alternatively a single ended reference (TXCO, CXO) may be used. The CMOS levels should
be applied to pin CLK16P via an AC coupling with the crystal oscillator enabled.
5.2.
The SYSCLK pin outputs the reference clock signal divided by a programmable integer.
Divisions from 1 to 2048 are possible. For divider ratios > 1 the duty cycle is 50%. Bits
SYSCLK[3:0] in the
disabled.
Outputting a frequency that is identical to the IF frequency (default 1 MHz) on the SYSCLK pin
is not recommended during receive operation, since it requires extensive decoupling on the
PCB to avoid interference.
5.3.
The PWRUP pin disables all analog blocks when it is pulled low. If the pin is pulled high, then
the power-up state of the analog blocks can be handled fully in software by programming
register PWRMODE. It is recommended to connect PWRUP to VDD.
Version 2.2
Crystal Oscillator
SYSCLK Output
PWRUP Input
PINCFG1
register set the divider ratio. The output on pin SYSCLK can be
PWRMODE
register. After reset the
Datasheet AX5042

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