hx6228 Mospec Semiconductor Corp., hx6228 Datasheet - Page 6
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hx6228
Manufacturer Part Number
hx6228
Description
128k X 8 Static Ram-soi Hx6228
Manufacturer
Mospec Semiconductor Corp.
Datasheet
1.HX6228.pdf
(12 pages)
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HX6228
READ CYCLE AC TIMING CHARACTERISTICS (1)
(1) Test conditions: input switching levels VIL/VIH=0.5V/VDD-0.5V (CMOS), VIL/VIH=0V/3V (TTL), input rise and fall times <1 ns/V, input and
(2) Typical operating conditions: VDD=5.0 V, TA=25°C, pre-radiation.
(3) Worst case operating conditions: VDD=4.5 V to 5.5 V, -55°C to 125°C, post total dose at 25°C.
TAVAVR
TAVQV
TAXQX
TSLQV
TSLQX
TSHQZ
TEHQV
TEHQX
TELQZ
TGLQV
TGLQX
TGHQZ
Symbol
output timing reference levels shown in the Tester AC Timing Characteristics table, capacitive output loading C
capacitive output loading C
Address Read Cycle Time
Address Access Time
Address Change to Output Invalid Time
Chip Select Access Time
Chip Select Output Enable Time
Chip Select Output Disable Time
Chip Enable Access Time
Chip Enable Output Enable Time
Chip Enable Output Disable Time
Output Enable Access Time
Output Enable Output Enable Time
Output Enable Output Disable Time
ADDRESS
NCS
DATA OUT
CE
NOE
Parameter
(NWE = high)
L
=5 pF for TSHQZ, TELQZ TGHQZ. For C
IMPEDANCE
HIGH
T
T
EHQX
EHQV
T
AVQV
T
T
T
T
T
SLQV
SLQX
AVAVR
GLQX
GLQV
6
L
>50 pF, derate access times by 0.02 ns/pF (typical).
DATA VALID
T
AXQX
Typical
(2)
16
15
12
16
12
16
12
5
6
4
4
4
Worst Case (3)
T
Min
T
25
ELQZ
-55 to 125
L
SHQZ
T
3
5
5
2
>50 pF, or equivalent
GHQZ
Max
25
25
10
25
10
°
9
9
C
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns