mt9v032 aptina, mt9v032 Datasheet - Page 42

no-image

mt9v032

Manufacturer Part Number
mt9v032
Description
1/3-inch Wide-vga Cmos Digital Image Sensor
Manufacturer
aptina
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mt9v032C12STM
Manufacturer:
ATMEL
Quantity:
101
Part Number:
mt9v032C12STM-DP
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
mt9v032C12STM-DR
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
mt9v032C12STM-DR
0
Part Number:
mt9v032L12STM ES
Manufacturer:
MICRON/镁光
Quantity:
20 000
Pixel Integration Control
Total Integration
R0x0B Total Shutter Width (In Terms of Number of Rows)
Changes to Integration Time
PDF: 6538045704/Source:2194051501
MT9V022_DS - Rev. C 9/10 EN
t
INT = (Number of rows of integration × row time) + overhead
1. During frame n, the new integration time is held in the R0x0B live register.
2. At the start of frame (n + 1), the new integration time is transferred to the exposure
3. When frame (n + 1) is read out, it is integrated using the new integration time. If the
This register (along with the window width and horizontal blanking registers) controls
the integration time for the pixels.
The actual total integration time,
Typically, the value of R0x0B (total shutter width) is limited to the number of rows per
frame (which includes vertical blanking rows), such that the frame rate is not affected by
the integration time. If R0x0B is increased beyond the total number of rows per frame, it
is required to add additional blanking rows using R0x06 as needed. A second constraint
is that
60Hz flicker, this means frame time must be a multiple of 1/120 of a second. Under 50Hz
flicker, frame time must be a multiple of 1/100 of a second.
With automatic exposure control disabled (R0xAF, bit 0 is cleared to LOW), and if the
total integration time (R0x0B) is changed through the two-wire serial interface while
FRAME_VALID is asserted for frame n, the first frame output using the new integration
time is frame (n + 2). Similarly, when automatic exposure control is enabled, any change
to the integration time for frame n first appears in frame (n + 2) output.
The sequence is as follows:
where:
– The number of rows integration is equal to the result of automatic exposure control
– Row time = (R0x04 + R0x05) master clock periods
– Overhead = (R0x04 + R0x05 – 255) master clock periods
control module. Integration for each row of frame (n + 1) has been completed using
the old integration time. The earliest time that a row can start integrating using the
new integration time is immediately after that row has been read for frame (n + 1).
The actual time that rows start integrating using the new integration time is depen-
dent on the new value of the integration time.
integration time is changed (R0x0B written) on successive frames, each value written
is applied to a single frame; the latency between writing a value and it affecting the
frame readout remains at two frames.
However, when automatic exposure control is disabled, if the integration time is
changed through the two-wire serial interface after the falling edge of FRAME_VALID
for frame n, the first frame output using the new integration time becomes frame
(n + 3).
(AEC) which may vary from frame to frame, or, if AEC is disabled, the value in
R0x0B
t
INT must be adjusted to avoid banding in the image from light flicker. Under
43
t
INT, is:
MT9V032: 1/3-Inch Wide-VGA Digital Image Sensor
Aptina reserves the right to change products or specifications without notice.
©2005 Aptina Imaging Corporation. All rights reserved.
Feature Description
(EQ 1)

Related parts for mt9v032