mt9v032 aptina, mt9v032 Datasheet - Page 17

• Manufacturer Part Number: mt9v032
• Description: 1/3-inch Wide-vga Cmos Digital Image Sensor
• Manufacturer: aptina

Two-Wire Serial Interface Sample Read and Write Sequences
16-Bit Write Sequence
Figure 9:
16-Bit Read Sequence
Figure 10:
PDF: 6538045704/Source:2194051501
MT9V022_DS - Rev. C 9/10 EN
S
SCLK
DATA
Timing Diagram Showing a Write to R0x09 with the Value 0x0284
Timing Diagram Showing a Read from R0x09; Returned Value 0x0284
START
S
SCLK
DATA
0xB8 ADDR
START
A typical write sequence for writing 16 bits to a register is shown in Figure 9. A start bit
given by the master, followed by the write address, starts the sequence. The image sensor
then gives an acknowledge bit and expects the register address to come first, followed by
the 16-bit data. After each 8-bit word is sent, the image sensor gives an acknowledge bit.
All 16 bits must be written before the register is updated. After 16 bits are transferred, the
register address is automatically incremented, so that the next 16 bits are written to the
next register. The master stops writing by sending a start or stop bit.
A typical read sequence is shown in Figure 10. First the master has to write the register
address, as in a write sequence. Then a start bit and the read address specify that a read
is about to happen from the register. The master then clocks out the register data 8 bits
at a time. The master sends an acknowledge bit after each 8-bit transfer. The register
address is auto-incremented after every 16 bits is transferred. The data transfer is
stopped when the master sends a no-acknowledge bit.
0xB8 ADDR
ACK
R0x09
ACK
ACK
Two-Wire Serial Interface Sample Read and Write Sequences
R0x09
18
0xB9 ADDR
MT9V032: 1/3-Inch Wide-VGA Digital Image Sensor
ACK
ACK
0000 0010
0000 0010
Aptina reserves the right to change products or specifications without notice.
ACK
ACK
©2005 Aptina Imaging Corporation. All rights reserved.
1000 0100
1000 0100
ACK
NACK
STOP
STOP