hys64t128000eu-3s-c2 Qimonda, hys64t128000eu-3s-c2 Datasheet - Page 17

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hys64t128000eu-3s-c2

Manufacturer Part Number
hys64t128000eu-3s-c2
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
3.3
3.3.1
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rev. 0.51, 2007-12
12032007-I9KE-FFWO
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) mentioned in Component datasheet.
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
@ CL = 3
@ CL = 4
@ CL = 5
Timing Characteristics
Speed Grade Definitions
Symbol
t
t
t
t
t
t
t
t
Symbol
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
CK
CK
CK
RAS
RC
RCD
RP
DDR2–800D
–25F
5–5–5
Min.
5
3.75
2.5
2.5
45
57.5
12.5
12.5
DDR2–667C
–3
4–4–4
Min.
5
3
3
45
57
12
12
17
Max.
8
8
8
8
70k
Max.
8
8
8
70k
HYS[64/72]T[128/256]0x0EU–[25F/2.5/3/3S]–C2
DDR2–800E
–2.5
6–6–6
Min.
5
3.75
3
2.5
45
60
15
15
DDR2–667D
–3S
5–5–5
Min.
5
3.75
3
45
60
15
15
Unbuffered DDR2 SDRAM Modules
Max.
8
8
8
8
70k
Max.
8
8
8
70k
Advance Internet Data Sheet
Speed Grade Definition
Speed Grade Definition
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
ns
ns
ns
ns
ns
ns
ns
CK
CK
TABLE 12
TABLE 13
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)

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