hys64t128021hdl-3-b Infineon Technologies Corporation, hys64t128021hdl-3-b Datasheet - Page 26

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hys64t128021hdl-3-b

Manufacturer Part Number
hys64t128021hdl-3-b
Description
200-pin So-dimm Ddr2 Sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 16
Parameter
Exit Self-Refresh to non-Read
command
Exit Self-Refresh to Read
command
1) For details and notes see the relevant INFINEON component data sheet
2) 0
3) 85 °C
4) WR must be programmed to fulfill the minimum requirement for the
3.3.3
List of ODT tables.
Table 17
Symbol
t
t
t
t
t
t
t
t
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high
Table 18
Symbol
t
t
t
t
t
t
Data Sheet
AOND
AON
AONPD
AOFD
AOF
AOFPD
ANPD
AXPD
AOND
AON
AONPD
AOFD
AOF
AOFPD
WR
already an integer, round to the next highest integer.
parameter stored in the MRS.
Table 17 “ODT AC Electrical Characteristics and Operating Conditions for DDR2-667 and DDR2-800”
on Page 26
Table 18 “ODT AC Characteristics and Operating Conditions for DDR2-533 and DDR2-400” on Page 26
max is when the ODT resistance is fully on. Both are measure from
impedance. Both are measured from
MIN
T
CASE
[cycles] =
T
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency 3
ODT Power Down Exit Latency
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
CASE
Timing Parameter by Speed Grade - DDR2-400 & DDR2-533 (cont’d)
ODT AC Electrical Characteristics
ODT AC Electrical Characteristics and Operating Conditions for DDR2-667 and DDR2-800
ODT AC Characteristics and Operating Conditions for DDR2-533 and DDR2-400
85 °C
95 °C
t
WR
(ns)/
t
CK
(ns) rounded up to the next integer value.
Symbol
t
t
XSNR
XSRD
t
AOFD
.
Min.
DDR2–533
t
200
RFC
+10
t
CK
Values
Min.
2
t
t
2.5
t
t
8
Values
Min.
2
t
t
2.5
t
t
refers to the application clock period. WR refers to the WR
AC.MIN
AC.MIN
AC.MIN
AC.MIN
AC.MIN
AC.MIN
AC.MIN
AC.MIN
26
Max.
+ 2 ns
+ 2 ns
+ 2 ns
+ 2 ns
HYS64T[32/64/128]xxxHDL-[2.5/…/5]-B
t
t
WR
AOND
t
DAL
timing parameter, where
.
Max.
2
t
2
2.5
t
2.5
Max.
2
t
2
2.5
t
2.5
= WR + (
AC.MAX
AC.MAX
AC.MAX
AC.MAX
SO-DIMM DDR2 SDRAM Module
DDR2–400
Min.
t
200
t
t
RFC
CK +
CK +
t
t
CK +
CK +
+10
t
t
AC.MAX
AC.MAX
+ 0.7 ns
+ 0.6 ns
+ 1 ns
+ 0.6 ns
t
t
t
AC.MAX
AC.MAX
RP
/
t
CK
+ 1 ns
+ 1 ns
). For each of the terms, if not
Max.
+ 1 ns ns
Electrical Characteristics
+ 1 ns ns
05122005-2TKP-OM7N
Unit
t
ns
ns
t
ns
t
t
Unit
t
ns
ns
t
ns
CK
CK
CK
CK
CK
CK
Rev 1.00, 2005-06
Unit Notes
ns
t
CK
Note
1)
2)
Note
1)
2)
1)

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