m470l1624bt0 Samsung Semiconductor, Inc., m470l1624bt0 Datasheet

no-image

m470l1624bt0

Manufacturer Part Number
m470l1624bt0
Description
128mb Ddr Sdram Module
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
M470L1624BT0
200pin DDR SDRAM SODIMM
128MB DDR SDRAM MODULE
(16Mx64 based on 16Mx16 DDR SDRAM)
200pin SODIMM
64-bit Non-ECC/Parity
Revision 0.2
Dec. 2001
Rev. 0.2 Dec. 2001

Related parts for m470l1624bt0

m470l1624bt0 Summary of contents

Page 1

... M470L1624BT0 128MB DDR SDRAM MODULE (16Mx64 based on 16Mx16 DDR SDRAM) 64-bit Non-ECC/Parity 200pin DDR SDRAM SODIMM 200pin SODIMM Revision 0.2 Dec. 2001 Rev. 0.2 Dec. 2001 ...

Page 2

... M470L1624BT0 Revision History Revision 0.0 (Apr. 2001) 1. First release. Revision 0.1 (June. 2001) 1. Changed module current speificaton 2. Changed typo size on module PCB in package dimesions. (from 2.6mm to 3mm). 3. Changed AC parameter table. Revision 0.2 (Dec. 2001) - Add derating values for the specifications if the single-ended clock skew rate is less than 1.0V/ns in page 47. ...

Page 3

... M470L1624BT0 200pin DDR SDRAM SODIMM 16Mx64 200pin DDR SDRAM SODIMM based on 16Mx16 GENERAL DESCRIPTION The Samsung M470L1624BT0 is 16M bit x 64 Double Data Rate SDRAM high density memory modules based on first gen of 256Mb DDR SDRAM respectively. The Samsung M470L1624BT0 consists of four CMOS16M x ...

Page 4

... M470L1624BT0 FUNCTIONAL BLOCK DIAGRAM S0 DQS0 LDQS S DM0 LDM DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 UDQS DM1 UDM DQ8 I/O 8 DQ9 I/O 9 DQ10 I/O 10 DQ11 I/O 11 DQ12 I/O 12 DQ13 I/O 13 DQ14 I/O 14 DQ15 I/O 15 DQS2 LDQS S DM2 LDM DQ16 I/O 0 DQ17 I DQ18 I/O 2 DQ19 I/O 3 DQ20 I/O 4 DQ21 I/O 5 DQ22 ...

Page 5

... M470L1624BT0 Absolute Maximum Rate Parameter Voltage on any pin relative to V Voltage on V & V supply relative DDQ Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...

Page 6

... M470L1624BT0 DDR SDRAM SPEC Items and Test Conditions Conditions Operating current - One bank Active-Precharge; tRC=tRCmin; DQ,DM and DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle Operating current - One bank operation ; One bank open, BL=4, Reads - Refer to the following page for detailed test condition Percharge power-down standby current ...

Page 7

... M470L1624BT0 DDR SDRAM I spec table DD Symbol A2(DDR266@CL=2) IDD0 IDD1 IDD2P IDD2F IDD2Q IDD3P IDD3N IDD4R IDD4W IDD5 IDD6 Normal Low power IDD7A I * Module was calculated on the basis of component DD < Detailed test conditions for DDR SDRAM IDD1 & IDD7 > IDD1 : Operating current: One bank operation 1 ...

Page 8

... M470L1624BT0 AC Operating Conditions Parameter/Condition Input High (Logic 1) Voltage, DQ, DQS and DM signals Input Low (Logic 0) Voltage, DQ, DQS and DM signals. Input Differential Voltage, CK and CK inputs Input Crossing Point Voltage, CK and CK inputs Note 1. VID is the magnitude of the difference between the input level on CK and the input on CK. ...

Page 9

... M470L1624BT0 AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data in to Read command Col. address to Col. address delay CL=2.0 Clock cycle time CL=2 ...

Page 10

... M470L1624BT0 Parameter Mode register set cycle time DQ & DM setup time to DQS DQ & DM hold time to DQS DQ & DM input pulse width Power down exit time Exit self refresh to non-Read command Exit self refresh to read command 64Mb, 128Mb Refresh interval time 256Mb Output DQS valid window ...

Page 11

... M470L1624BT0 6. Input Setup/Hold Slew Rate Derating Input Setup/Hold Slew Rate (V/ns) 0.5 0.4 0.3 This derating table is used to increase t based on the lesser of AC-AC slew rate and DC-DC slew rate. 7. I/O Setup/Hold Slew Rate Derating I/O Setup/Hold Slew Rate (V/ns) 0.5 0.4 0.3 This derating table is used to increase t based on the lesser of AC-AC slew rate and DC-DC slew rate. ...

Page 12

... M470L1624BT0 Command Truth Table COMMAND Register Extended MRS Register Mode Register Set Auto Refresh Refresh Self Refresh Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...

Page 13

... M470L1624BT0 PACKAGE DIMENSIONS 0.16 0.039 (4.00 0.10) 1 0.086 2.15 0.098 2.45 2 0.150 Max (3.80 Max) 0.04 0.0039 (1.00 0.10) Tolerances : .006(.15) unless otherwise specified The used device is 16Mx16 SDRAM, TSOP SDRAM Part No. : K4H561638B-TC/L 2.70 (67.60) 2.50 (63.60 0.456 1.896 11.40 (47.40) 0.17 (4.20) 0.096 (2.40) 0.07 (1. 0.16 (4.00 0.04 0.0039 (1.00 0.1) Detail Z 200pin DDR SDRAM SODIMM Units : Inches (Millimeters) 199 2- 0.07 (1.80) Y 200 ...

Related keywords