mt18jsf25672az Micron Semiconductor Products, mt18jsf25672az Datasheet - Page 19

• Manufacturer Part Number: mt18jsf25672az
• Description: 2gb, 4gb X72, Ecc, Dr 240-pin Ddr3 Sdram Udimm
• Manufacturer: Micron Semiconductor Products

Table 21: Configuration Register Bit Descriptions (Continued)
PDF: 09005aef83606b46
jsf18c256_512x72az.pdf – Rev. B 5/09
10:9
Bit
4
5
6
7
8
Description
Event status
0: EVENT# has not been asserted by this device
1: EVENT# is being asserted due to an alarm window
or critical temperature condition
Clear event
0: No effect
1: Clears the event when the temperature sensor is
in the interrupt mode
Alarm window lock bit
0: Alarm trips are not locked and can be changed
1: Alarm trips are locked and cannot be changed
Critical trip lock bit
0: Critical trip is not locked and can be changed
1: Critical trip is locked and cannot be changed
Shutdown mode
0: Enabled
1: Shutdown
Hysteresis enable
00: Disable
01: Enable at 1.5°C
10: Enable at 3°C
11: Enable at 6°C
Temperature Sensor with Serial Presence-Detect EEPROM
2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM
19
Notes
This is a read-only field in the register. The event caus-
ing the event can be determined from the read tem-
perature register.
The shutdown mode is a power-saving mode that dis-
ables the temperature sensor.
When enabled, a hysteresis is applied to tempera-
ture movement around the trip points (see Figure 4
(page 20)). As an example, if the hysteresis register
is enabled to a delta of 6°C, the preset trip points
will toggle when the temperature reaches the pro-
grammed value. These values will reset when the
temperature drops below the trip points minus the
set hysteresis level. In this case, this would be critical
temperature minus 6°C.
The hysteresis is applied to both the above alarm win-
dow and the below alarm window bits found in the
read-only temperature register (see Table 22
(page 20)). EVENT# is also affected by this register.
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