mt18hts25672rhy-53e Micron Semiconductor Products, mt18hts25672rhy-53e Datasheet

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mt18hts25672rhy-53e

Manufacturer Part Number
mt18hts25672rhy-53e
Description
2gb, 4gb X72, Ecc, Dr 200-pin Ddr2 Sdram Sordimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 1:
DDR2 SDRAM SORDIMM
MT18HTS25672RH – 2GB
MT18HTS51272RH – 4GB
For component data sheets, refer to Micron’s Web site:
Features
• 200-pin, small-outline registered, dual in-line
• Fast data transfer rates: PC2-3200, PC2-4200,
• 2GB (256 Meg x 72), 4GB (512 Meg x 72)
• Supports ECC error detection and correction
• V
• V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Multiple internal device banks for concurrent
• Programmable CAS# latency (CL)
• Posted CAS additive latency (AL)
• WRITE latency = READ latency - 1
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• PLL to reduce system clock line loading
• Gold edge contacts
• Dual rank, using TwinDie™ devices
• I
PDF: 09005aef828665bd/Source: 09005aef828665a3
HTS18C_256_512x72RH.fm - Rev. B 5/08 EN
Speed
Grade
memory module (SORDIMM)
or PC2-5300
operation
2
-667
-53E
-40E
DD
DDSPD
C temperature sensor
= V
DD
= +3.0V to +3.6V
Q = +1.8V
Key Timing Parameters
Industry Nomenclature
Products and specifications discussed herein are subject to change by Micron without notice.
PC2-5300
PC2-4200
PC2-3200
t
CK
2GB, 4GB (x72, ECC, DR) 200-Pin DDR2 SDRAM SORDIMM
CL = 5
667
Data Rate (MT/s)
www.micron.com
CL = 4
533
533
1
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Operating temperature
• Package
• Frequency/CAS latency
• PCB height
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 200-pin DIMM (Pb-free)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
– 5.0ns @ CL = 3 (DDR2-400)
– 30mm (1.18in)
CL = 3
PCB height: 30mm (1.18in)
400
400
400
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. CL = CAS (READ) latency; registered mode
module offerings.
will add one clock cycle to CL.
200-Pin SORDIMM (MO-224)
t
(ns)
RCD
15
15
15
A
A
1
2
≤ +85°C)
≤ +70°C)
©2007 Micron Technology, Inc. All rights reserved.
(ns)
t
15
15
15
RP
Marking
Features
None
-53E
-40E
-667
(ns)
t
Y
55
55
55
I
RC

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mt18hts25672rhy-53e Summary of contents

Page 1

... MT18HTS51272RH – 4GB For component data sheets, refer to Micron’s Web site: Features • 200-pin, small-outline registered, dual in-line memory module (SORDIMM) • Fast data transfer rates: PC2-3200, PC2-4200, or PC2-5300 • 2GB (256 Meg x 72), 4GB (512 Meg x 72) • Supports ECC error detection and correction • ...

Page 2

... Refresh count Row address Device bank address Device page size per bank Device configuration Column address Module rank address Table 3: Part Numbers and Timing Parameters – 2GB Modules Base device: MT47H256M8THN, 2 Part Number MT18HTS25672RH(I)Y-667__ MT18HTS25672RH(I)Y-53E__ MT18HTS25672RH(I)Y-40E__ Table 4: Part Numbers and Timing Parameters – 4GB Modules ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 200-Pin SORDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ18 101 REF 3 DQ0 53 DQ19 103 105 DQ1 57 ...

Page 4

... DQ and DQS pins. SCL Input Serial clock: SCL is used to synchronize the presence-detect and temperature sensor data (SSTL_18) transfer to and from the module. SA0–SA1 Input Serial address inputs: These pins are used to configure the presence-detect and (SSTL_18) temperature sensor devices. ...

Page 5

Functional Block Diagram Figure 2: Functional Block Diagram RS1# RS0# DQS0# DQS0 DM0 DQ0 DQ DQ1 DQ DQ2 DQ DQ3 DQ DQ4 DQ DQ5 DQ DQ6 DQ DQ7 DQ DQS1# DQS1 DM1 DQ8 DQ DQ9 DQ DQ10 DQ DQ11 DQ ...

Page 6

... DDR2 SDRAM modules incorporate serial presence-detect (SPD). The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes are programmed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...

Page 7

... Simulations are significantly more accurate and realistic than a gross estimation of module capacitance when inductance and delay parameters associated with trace lengths are used in simulations. JEDEC modules are currently designed using simulations to close timing budgets. Component AC Timing and Operating Conditions Recommended AC operating conditions are given in the DDR2 component data sheets. Component specifications are available on Micron’ ...

Page 8

I Specifications DD Table 9: DDR2 I Specifications and Conditions – 2GB DD Values shown for MT47H256M8THN DDR2 SDRAM only and are computed from values specified in the 2Gb TwinDie (256 Meg x 8) component data sheet Parameter/Condition Operating one ...

Page 9

Table 10: DDR2 I Specifications and Conditions – 4GB DD Values shown for MT47H512M8THM DDR2 SDRAM only and are computed from values specified in the 4Gb TwinDie (512 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current: ...

Page 10

... Timing and switching specifications for the register listed above are critical for proper oper- ation of the DDR2 SDRAM registered DIMMs. These are meant subset of the param- eters for the specific device used on the module. Detailed information for this register is available in JEDEC standard JESD82. ...

Page 11

Table 12: PLL Specifications CUA845 device or JESD82-21 equivalent Parameter Symbol DC high-level input voltage V DC low-level input voltage V V Input voltage (limits) V Input differential-pair cross voltage Input differential voltage V ID Input differential voltage V ID ...

Page 12

... Temperature Sensor The temperature sensor continuously monitors the module’s temperature and can be read back at any time over the I the JEDEC standard JC-42.4. Table 14: Temperature Sensor Specifications All voltages referenced to V Parameter/Condition Supply voltage Average operating supply current Input high voltage: Logic 1; All inputs Input low voltage: Logic 0 ...

Page 13

The interrupt mode allows software to reset EVENT# after a critical temperature threshold has been detected. Threshold points are set in the configuration register by the user. This mode triggers the critical temperature limit and both the MIN and MAX ...

Page 14

Table 16: Temperature Sensor Registers Name Pointer register Capability register Configuration register Alarm temperature upper boundary register Alarm temperature lower boundary register Critical temperature register Temperature register Pointer Register The pointer register selects which of the 16-bit registers is being ...

Page 15

Table 20: Capability Register Bit Descriptions Bit Description 0 Basic capability 1: Has alarm and critical trip point capabilities 1 Accuracy 0: ±2°C over the active range and ±3°C over the monitor range 1: ±1°C over the active range and ...

Page 16

Table 22: Configuration Register Bit Descriptions (continued) Bit Description 6 Alarm window lock bit 0: Alarm trips are not locked and can be changed 1: Alarm trips are locked and cannot be changed 7 Critical trip lock bit 0: Critical ...

Page 17

Temperature Format The temperature trip point registers and temperature readout register use a “2’s complement” format to enable negative numbers. The least significant bit (LSB) is equal to 0.0625°C or 0.25°C depending on which register is referenced example, ...

Page 18

Temperature Register The temperature register is a read-only register that provides the current temperature detected by the temperature sensor. The LSB for this register is 0.0625°C with a resolu- tion of 0.0625°C. The most significant bit (MSB) is 128°C in ...

Page 19

Serial Presence-Detect Table 29: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT SPD ...

Page 20

... Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on assembly 4 Number of column addresses on assembly 5 DIMM height and module ranks 6 Module data width 7 Reserved 8 Module voltage interface levels t 9 SDRAM cycle time, CK (CL = MAX value, see byte 18) ...

Page 21

... Optional features, not supported 62 SPD revision 63 Checksum for bytes 0–62 64 Manufacturer’s JEDEC ID code 65–71 Manufacturer’s JEDEC ID code 72 Manufacturing location 73–90 Module part number (ASCII) 91 PCB identification code 92 Identification code (continued) 93 Year of manufacture in BCD 94 Week of manufacture in BCD 95–98 Module serial number 99–127 Reserved for manufacturer-specific data 128– ...

Page 22

... TYP PIN 1 63.60 (2.504) TYP Back view U11 U12 U13 4.2 (0.165) PIN 200 TYP 47.4 (1.87) TYP ® respective owners. sometimes occur. 22 Module Dimensions 30.15 (1.187) U9 29.85 (1.175) 20.0 (0.787) TYP 1.10 (0.043) 0.90 (0.035) PIN 199 TYP U14 10.00 (0.394) TYP PIN 2 11.4 (0.45) TYP 16.26 (0.64) TYP Micron Technology, Inc., reserves the right to change products or specifications without notice. ...

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