m69ar024b STMicroelectronics, m69ar024b Datasheet - Page 4

• Manufacturer Part Number: m69ar024b
• Description: 16 Mbit 1m X16 1.8v Supply, Asynchronous Psram
• Manufacturer: STMicroelectronics

M69AR024B
SUMMARY DESCRIPTION
The M69AR024B is a 16 Mbit (16,777,216 bit)
CMOS memory, organized as 1,048,576 words by
16 bits, and is supplied by a single 1.7V to 2.25V
supply voltage range.
M69AR024B is a member of STMicroelectronics
1T/1C (one transistor per cell) memory family.
These devices are manufactured using dynamic
random access memory cells, to minimize the cell
size, and maximize the amount of memory that
can be implemented in a given area.
However, through the use of internal control logic,
the device is fully static in its operation, requiring
no external clocks or timing strobes, and has a
standard Asynchronous SRAM Interface.
Figure 2. Logic Diagram
4/28
A0-A19
UB
E1
E2
LB
W
G
20
M69AR024B
V CC
V SS
16
DQ0-DQ15
AI07260
The internal control logic of the M69AR024B han-
dles the periodic refresh cycle, automatically, and
without user involvement.
Write cycles can be performed on a single byte by
using Upper Byte Enable (UB) and Lower Byte En-
able (LB).
The device can be put into standby mode using
Chip Enable (E1) or in deep power down mode by
using Chip Enable (E2).
Power-Down mode achieves a very low current
consumption by halting all the internal activities.
Since the refresh circuitry is halted, the duration of
the power-down should be less than the maximum
period for refresh, if the user has not finished with
the data contents of the memory.
Table 1. Signal Names
A0-A19
DQ0-DQ15
E1, E2
G
W
UB
LB
V
V
NC
CC
SS
Address Inputs
Data Input/Output
Chip Enable
Output Enable
Write Enable
Upper Byte Enable Input
Lower Byte Enable Input
Supply Voltage
Ground
Not Connected
(no internal connection)