m69ar024b STMicroelectronics, m69ar024b Datasheet - Page 17

no-image

m69ar024b

Manufacturer Part Number
m69ar024b
Description
16 Mbit 1m X16 1.8v Supply, Asynchronous Psram
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
m69ar024bL
Manufacturer:
ST
0
Part Number:
m69ar024bL-70ZB8
Manufacturer:
ST
Quantity:
10 890
Part Number:
m69ar024bL-70ZB8
Manufacturer:
ST
0
Part Number:
m69ar024bL70ZB8
Manufacturer:
ST
0
Part Number:
m69ar024bL70ZB8
Manufacturer:
ST
Quantity:
20 000
Part Number:
m69ar024bL80ZBB
Manufacturer:
ST
0
Note: 1. Maximum value is applicable if E1 is kept at Low without any address change. If needed by system operation, please contact your
Figure 10. Chip Enable Controlled, Write AC Waveforms
Note: E2 = High.
t
t
t
Symbol
t
WHAX
WLWH
WLBH
GHEL
t
WHDZ
2. Minimum value must be equal to or greater than the sum of write pulse (t
3. Write pulse is defined from the falling edge of E1, W, or LB/UB, whichever occurs last.
4. Write recovery is defined from Write pulse is defined from the rising edge of E1, W, or LB/UB, whichever occurs first.
5. Applicable to any address change when E1 stays Low.
6. If G is Low after minimum t
7. If G is Low after new address input, the read cycle is initiated. In other words, G must be brought High at the same time or before
8. Applicable for Byte mask only. Byte mask setup time is defined to the High to Low transition of E1 or W whichever occurs last.
9. Applicable for Byte mask only. Byte mask hold time is defined from the Low to High transition of E1 or W whichever occurs first.
(6)
(3)
(4)
(3)
local ST representative for relaxation of the 1000ns limitation.
or t
Low. Once the read cycle is initiated, new write pulse should be input after minimum Read Cycle Time is met.
new address valid. Once the read cycle is initiated, new write pulse should be input after minimum Read Cycle Time is met.
DQ0-DQ15
BR
A0-A19
LB, UB
).
t
OHCL
Alt.
t
t
t
t
WR
WP
WP
DH
E1
W
G
Output Enable High to Chip Enable Low
Write Enable High to Address Transition
Write Enable High to Input Hi-Z
Write Enable Low to LB, UB High
Write Enable Low to Write Enable High
tGHEL
tAVWL
tAVEL
tAVBL
GHEL
, the read cycle is initiated. In other words, G must be brought High within 5ns after E1 is brought
Parameter
ADDRESS VALID
tELEH
tWLWH
tBLBH
tDVWH
tDVEH
tDVBH
tELAX
ELEH
VALID DATA INPUT
, t
WLWH
tWHAX
tEHAX
tBHAX
or t
BLBH
Min
65
–5
15
65
0
) and write recovery time (
M69AR024B
tWHDZ
tEHDZ
tBHDZ
70, 80
tAVEL
tAVWL
1000
1000
M69AR024B
Max
tAVBL
ai09384
tWRC
17/28
Unit
, t
ns
ns
ns
ns
ns
WR

Related parts for m69ar024b