lrs1805a Sharp Microelectronics of the Americas, lrs1805a Datasheet - Page 40
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lrs1805a
Manufacturer Part Number
lrs1805a
Description
Stacked Chip Flash Memory Smartcombo
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1805A.pdf
(57 pages)
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15. Flash Memory Data Protection
Noises having a level exceeding the limit specified in the specification may be generated under specific operating conditions on
some systems. Such noises, when induced onto F-WE signal or power supply, may be interpreted as false commands and causes
undesired memory updating. To protect the data stored in the flash memory against unwanted writing, systems operating with the
flash memory should have the following write protect designs, as appropriate:
The below describes data protection method.
Protection against noises on F-WE signal
1. Protection of data in each block
2. Protection of data with F-V
3. Protection of data with F-RST
•
• For detailed block locking scheme, see Chapter 5.Command Definitions for Flash Memory.
• When the level of F-V
• Especially during power transitions such as power-up and power-down, the flash memory enters reset mode by bringing
• For detailed description on F-RST control, see Chapter 12.6 AC Electrical Characteristics for Flash Memory, Reset
To prevent the recognition of false commands as write commands, system designer should consider the method for
reducing noises on F-WE signal.
down block by setting its block lock-down bit is protected from lock status changes.
By using this function, areas can be defined, for example, program area (locked blocks), and data area (unlocked
blocks).
blocks are locked and the data in the blocks are completely protected.
F-RST to low, which inhibits write operation to all blocks.
Operations.
ny locked block by setting its block lock bit is protected against the data alternation. When F-WP is low, any locked-
PP
PP
is lower than V
control
PPLK
(F-V
L R S 1 8 0 5 A
PP
lockout voltage), write functions to all blocks are disabled. All
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