s71ns128ja0 Advanced Micro Devices, s71ns128ja0 Datasheet - Page 21

• Manufacturer Part Number: s71ns128ja0
• Description: Stacked Multi-chip Product Mcp , 128 Megabit 8 M X 16-bit And 64 Megabit 4 M X 16-bit , 110 Nm Cmos 1.8 Volt-only Simultaneous Read/write, Burst Mode Flash Memories With 16 Megabit 1 M X 16-bit Psram
• Manufacturer: Advanced Micro Devices

pSRAM CHARACTERISTICS
Notes:
1. A write occurs during the overlap (t
February 5, 2004 31136A1
low CS# and low WE# with asserting UB# or LB# low for single byte operation or simultaneously asserting UB# and LB# low
for word operation. A write ends at the earliest transition among high CS# and high WE#. The t
beginning of write to the end of write.
AVD#
Address/Data
WE#
CS#
UB#, LB#
AVD#
Address/Data
WE#
CS#
UB#, LB#
pSRAM Write Access Timing Diagrams
Figure 8. pSRAM Write Cycle 2 (OE# = V
Figure 7. pSRAM Write Cycle 1 (OE# = V
A
A
WRL
Address Valid
P r e l i m i n a r y
t
AVDS
) of low CS#, low WE# and low UB# or LB#. A write begins at the last transition among
Address Valid
t
t
t
t
t
AVD
AVD
CSS
CSS
AVDS
S71NS128JA0/S71NS064JA0
B
B
t
t
AVDH
AVDH
t
t
ACW1
t
ACW2
ACW3
t
t
WRL
WRL
t
t
BW
BW
C
C
Data Valid
Data Valid
t
t
DW
DW
IH
IH
)
)
t
t
DH
DH
WRL
is measured from the
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