hi-3200 Holt Integrated Circuits, Inc., hi-3200 Datasheet - Page 28

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hi-3200

Manufacturer Part Number
hi-3200
Description
Avionics Data Management Engine / Arinc 429 - Can Bus Bridge
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet
The transmit sequence pointer is set to zero on Master
Reset. Once the Control Register RUN /
high, sequence execution begins at sequence count
zero. After the first word is sent, the pointer is
incremented by one descriptor (counts descriptor
frames).
The Repetition rate register value defines the time
interval between successive starts of the programmed
transmit sequence for each ARINC 429 transmit channel.
The value is set in binary, with the LSB representing 10
ms. Repetition rate time periods may therefore be set
from 0 ms to 2.55 seconds
If the repetition rate is shorter than the minimum time
needed to transmit all ARINC 429 words in the sequence
(but not zero), the transmit sequence will begin again
immediately if the Control Register SKIP bit is a zero. If
the SKIP bit is a one, the sequencer will wait until the
next rollover of the Repetition Rate Counter before
starting a new cycle.
REPETITION RATE REGISTER
(Address 0x801C - 0x801F)
TRANSMIT SEQUENCE POINTERS 0 -3
(Address 0x802C - 0x802F)
STOP
HOLT INTEGRATED CIRCUITS
bit goes
MSB
MSB
7
7
HI-3200, HI-3201
Current Sequence number
Channel Repetition Period
6
6
5
5
4
4
28
3
3
This continues until the programmed sequence is
complete. The sequence pointer is then reset to the
beginning of the descriptor table and program execution
begins as soon the channel repetition rate counter time
elapses.
When the Repetition Rate counter is programmed to zero
(default), the transmit sequence shall execute one time
only. A zero - to - one transition of the RUN/STOP bit will
cause the transmit sequence to start. One-time execution
of the sequencer is useful when transmitting ARINC 429
words directly from the host CPU. One or more
immediate-mode descriptors can be written into the
sequence table, transmitted, and then refreshed for the
next cycle.
2
2
1
1
LSB
LSB
0
0

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