s71gs256nc0bawak0 Meet Spansion Inc., s71gs256nc0bawak0 Datasheet - Page 186

• Manufacturer Part Number: s71gs256nc0bawak0
• Description: Stacked Multi-chip Product Mcp 256/128 Megabit 16/8m X 16-bit Cmos 3.0 Volt Vcc And 1.8 V Vio Mirrorbit Tm Uniform Sector Page-mode Flash Memory With 64/32 Megabit 4/2m X 16-bit 1.8v Psram
• Manufacturer: Meet Spansion Inc.

Notes:
1. High-Z to Low-Z timings are tested with the circuit shown in
2. Low-Z to High-Z timings are tested with the circuit shown in
186
100mV transition away from the High-Z (V
a 100mV transition from either V
Parameter
Address Setup Time
Address Valid to End of Write
Chip Deselect to ZZ# LOW
Chip Enable to End of Write
Write Cycle Time
Write Pulse Width
Write Recovery Time
ZZ# LOW to WE# LOW
Parameter
Chip Deselect to ZZ# LOW
Deep Power-Down Recovery
Minimum ZZ# Pulse Width
Parameter
Address Setup Time
Address Valid to End of Write
Byte Select to End of Write
CE# HIGH Time During Write
Maximum CE# Pulse Width
Chip Enable to End of Write
Data Hold from Write Time
Data WRITE Setup Time
Chip Enable to Low-Z Output
End WRITE to Low-Z Output
Write Cycle Time
Write to High-Z Output
Write Pulse Width
Write Recovery Time
Table 77. Load Configuration Register Timing Requirements
Table 78. Deep Power Down Timing Requirements
Table 76. WRITE Cycle Timing Requirements
OH
or V
OL
A d v a n c e
CCQ
toward V
/2) level toward either V
CellularRAM-2A
CCQ
/2.
Symbol
t
t
t
t
t
t
t
t
t
t
t
WHZ
t
t
t
CEH
CEM
AW
BW
CW
DW
OW
WC
WR
DH
WP
AS
LZ
Figure 71
I n f o r m a t i o n
Figure 71
Symbol
Symbol
t
t
t
t
ZZMIN
ZZWE
CDZZ
CDZZ
t
t
t
t
t
t
AW
CW
WC
WR
t
WP
AS
R
Min
70
70
70
23
10
70
46
0
5
0
5
0
0
on
OH
on
150
page
Min
Min
or V
70
70
70
40
10
10
page
0
5
0
5
Max
10
8
OL
184. The Low-Z timings measure a
184. The High-Z timings measure
.
Max
Max
Units
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
cellRAM_02_A0 December 15, 2004
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
Notes
1
2
Notes
Notes