s71gs256nc0bawak0 Meet Spansion Inc., s71gs256nc0bawak0 Datasheet - Page 143

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s71gs256nc0bawak0

Manufacturer Part Number
s71gs256nc0bawak0
Description
Stacked Multi-chip Product Mcp 256/128 Megabit 16/8m X 16-bit Cmos 3.0 Volt Vcc And 1.8 V Vio Mirrorbit Tm Uniform Sector Page-mode Flash Memory With 64/32 Megabit 4/2m X 16-bit 1.8v Psram
Manufacturer
Meet Spansion Inc.
Datasheet
Note: Non-default BCR settings: Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
October 4, 2004 cellRAM_00_A0
DQ[15:0]
LB#/UB#
A [ 2 2 : 0 ]
ADV#
WAIT
WE#
OE#
CE#
CLK
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V OH
V OL
V OH
V OL
READ Burst Identified
High-Z
Figure 45. Four-word Burst READ Operation (with LB#/UB#)
( WE# = HIGH)
t SP
Address
t CSP
t SP
t SP
t SP
Valid
A d v a n c e
t CEW
High-Z
t HD
t HD
t HD
t HD
t OLZ
I n f o r m a t i o n
t ACLK
CellularRAM Type 2
t BOE
t KHTL
t CLK
OUTPUT
VALID
t KOH
OUTPUT
VALID
Legend:
t KHTL
High-Z
t KHTL
Don't Care
OUTPUT
VALID
t HD
t KHTL
t OHZ
t HZ
t CBPH
Undefined
High-Z
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