am79c930 Advanced Micro Devices, am79c930 Datasheet - Page 40
am79c930
Manufacturer Part Number
am79c930
Description
Pcnet-mobile Single-chip Wireless Lan Media Access Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C930.pdf
(161 pages)
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Pin 126: TXCMD
The TXCMD pin may be configured to drive a trans-
ceiver control reference signal, using one of two timing
Transmit state machine generated signals T1, T2, T3,
Pin 129: TXPE
The TXPE pin may be configured to drive a transceiver
control reference signal, using one of two timing sources
plus input from the TXPE bit of TIR11 (TIR11[1]) and
the TXPEPOL bit of TCR27, according to the
following table:
Pin 131: TXMOD
The TXMOD pin may be configured to drive a trans-
ceiver control reference signal, using input from the
TXMOD bit of TIR11 (TIR11[2]) and the TXMODPOL bit
of TCR27, according to the following table:
Pin 132: ANTSLT
The ANTSLT pin may be configured to drive an inter-
nally generated antenna selection signal using the inter-
nal antenna diversity circuitry, or it may be controlled by
a register bit. Pin functionality is programmed according
to the following table:
Pin 141: ANTSLT/LA23
The ANTSLT/LA23 pin may be configured to operate as
input or output and may be configured to drive an
40
TXP _ ON and O_TX have the timing indicated in the
AMD
TIR11[3]
TIR11[3]
RCEN
RCEN
0
0
1
1
0
0
1
1
Mode
TX
TIR11[3]
0
0
0
1
RCEN
0
1
TXMODPOL
TXPEPOL
TCR27[1]
TCR27[0]
0
1
0
1
0
1
0
1
(TIR16[[3])
ANTSEN
X
X
0
1
TXMOD Pin
TXPE Pin
Direction
Direction
P R E L I M I N A R Y
O
O
O
O
O
O
O
O
TXCMD Pin
Am79C930
Direction
O
O
(TIR4:[7])
sources plus input from the TXCMD bit of TIR11
(TIR11[0]), according to the following table:
diagram in section Am79C930-Based TX Power
Ramp Control.
Transmit state machine generated signals T1, T2, T3,
diagram in section Am79C930-Based TX Power
Ramp Control.
Transmit state machine generated signals T1, T2, T3,
diagram in section Am79C930-Based TX Power
Ramp Control.
If it is necessary to force ANTSLT to be always constant,
then program ANTS to 0 or user ANTSLT pin, which can
be controlled by ANTSLTD (TCR7:[1]).
internally generated antenna selection reference signal
using the internal antenna diversity circuitry. Note that
ANTEN
TXP _ ON and O_TX have the timing indicated in the
TXP _ ON and O_TX have the timing indicated in the
TIR11[1] & T2
TIR11[1] + T2
TIR11[2] & T3
TIR11[2] + T3
TXMOD Pin
X
0
0
1
TXPE Pin
TXP_ON
TXP_ON
Value
Value
T3
T3
ANTSLT <= low
ANTSEL <= ANTS (TIR26:[4])
ANTSLT <= internal ANTSEL
ANTSLT <= low
(& = logical ‘AND’)
(+ = logical ‘OR’)
(& = logical ‘AND’)
(+ = logical ‘OR’)
TIR11[0] & T1
TXCMD Pin
Value
O_TX
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