am79c930 Advanced Micro Devices, am79c930 Datasheet - Page 132

• Manufacturer Part Number: am79c930
• Description: Pcnet-mobile Single-chip Wireless Lan Media Access Controller
• Manufacturer: Advanced Micro Devices

PCMCIA MEMORY WRITE ACCESS
Notes:
1. The max value for this parameter assumes the following worst case situation:
2. Parameter is not included in production test.
132
Value
0
1
2
3
4
5
6
7
Parameter
AMD
Symbol
tWTLWTH
tWTHWH
tWHQNZ
tWLWTV
tGLQNZ
tWLWH
tWMDX
tAVWH
tWMAX
tGHWL
tWHGL
tDVWH
tAVWL
tELWH
tGHEH
tGHQZ
tWLQZ
tELWL
Worst Case
FLASH and SRAM wait states set at “3.”
Host performs PCMCIA WRITE cycle at same time that Am79C930 embedded 80188 controller begins
instruction fetch cycle to FLASH memory.
PCMCIA WRITE cycle is posted internal to Am79C930 device, pending the completion of the embedded 80188
controller access.
Host performs PCMCIA READ cycle immediately following completion of PCMCIA WRITE cycle.
After completion of first embedded 80188 access to FLASH, posted PCMCIA WRITE executes to SRAM;
PCMCIA READ stycle is being held in wait state.
After completion of posted ISA WRITE cycle, new embedded 80188 access to FLASH begins.
After completion of second embedded 80188 access to FLASH, PCMCIA READ cycle is allowed to proceed onto
memory bus to SRAM; host is still held in wait state.
At SRAM READ cycle completion, data is delivered to PCMCIA bus and wait state is exited.
Parameter Description
Address setup to WE
Address setup to WE
Write recovery time
(Address hold from WE
CE setup to WE
CE setup to WE
CE hold from OE
hold from WE
OE setup to WE
OE hold from WE
WE pulse width
WAIT valid from WE
WAIT pulse width
WE hold from WAIT
Data setup to WE
Data hold from WE
Data disabled from OE
Data disabled from WE
Data enabled from WE
Data enabled from OE
(WRITE)
(READ) or CE
)
P R E L I M I N A R Y
Am79C930
Test Conditions
Notes 1, 2
Note 2
Note 2
Note 2
Note 2
Min
100
140
120
20
20
20
10
10
35
60
30
0
0
5
5
53 X TCLKIN
Max
90
90
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns