am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 120

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

Recommendation for Power and Ground
Decoupling
The PCnet-SCSI controller is an integrated, combina-
tion Ethernet and Fast SCSI controller, which contains
both digital and analog circuitry. The analog circuitry
contains a high speed Phase-Locked Loop (PLL) and
Voltage Controlled Oscillator (VCO). Because of the
mixed signal characteristics of this chip, some extra pre-
cautions must be taken into account when designing
with this device.
Digital Decoupling
The PCnet-SCSI controller separates the digital power
supply pins into two groups. The VSSB and VDDB pins sup-
ply power to the I/O buffers that connect to the PCI bus.
The VSS and VDD pins supply power to all internal cir-
cuitry. AMD recommends that at least one low fre-
quency bulk decoupling capacitor be used for each
group of digital power pins. 22
worked well for this. In addition, a total of four or five
0.1 F capacitors have proven sufficient around VSSB
and VDDB pins that supply the drives of the PCI bus out-
put pins. An additional two to the three 0.1 F capacitors
shoud be used around the VSS and VDD pins.
The CMOS technology used in fabricating the PCnet-
SCSI controller employs an n-type substrate. In this
technology, all VDD and VDDB pins are electrically con-
nected to each other internally. Hence, in a multi-layer
board, when decoupling between VDD/VDDB and critical
VSS/VSSB pins, the specific VDD/VDDB pin that you connect
to is not critical. In fact, the VDD/VDDB connection of the
decoupling capacitor can be made directly to the power
plane, near the closest VDD/VDDB pin to the VSS/VSSB pin
of interest. However, we recommend that the VSS/VSSB
connection of the decoupling capacitor be made directly
to the VSS/VSSB pin of interest as shown.
120
via to VSS plane
APPENDIX C
via to VDD plane
VDD/VDDB Pin
VSS/VSSB Pin
PCnet-SCSI
F capacitors have
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Am79C974
AMD recommends that at least one low-frequency bulk
decoupling capacitor be used in the area of the PCnet-
SCSI controller. 22 F capacitors have worked well for
this. In addition, a total of four or five 0.1 F capacitors
have proven sufficient around the VSSB and VDDB pins
that supply the drivers of the PCI bus output pins.
Analog Decoupling
The most critical pins are the analog supply and ground
pins. All of the analog supply and ground pins are lo-
cated in one corner of the device. Specific requirements
of the analog supply pins are listed below.
AV
These pins provide the power and ground for the
Twisted Pair and AUI drivers. Hence, they are very
noisy. A dedicated 0.1 F capacitor between these pins
is recommended.
AV
These pins are the most critical pins on the PCnet-SCSI
controller because they provide the power and ground
for the PLL portion of the chip. The VCO portion of the
PLL is sensitive to noise in the 60 kHz –200 kHz. range.
To prevent noise in this frequency range from disrupting
the VCO, AMD strongly recommends that the low-pass
filter shown below be implemented on these pins. Tests
using this filter have shown significantly increased noise
immunity and reduced Bit Error Rate (BER) statistics in
designs using the PCnet-SCSI controller.
SS1
SS2
(Pin 100) and AV
(Pin 98) and AV
VDD Plane
PCnet-SCSI
AVDD
Pin 108
AVSS
Pin 98
DD2
DD3
(Pin 108)
33 F to 6.8 F
(Pin 96)
2.7
R1
to 20
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