zl50408 Zarlink Semiconductor, zl50408 Datasheet - Page 12

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zl50408

Manufacturer Part Number
zl50408
Description
Managed 8-port 10/100m 1-port 10/100/1000m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.3
All pins are CMOS type; all Input Pins are 5 Volt tolerance; and all Output Pins are 3.3 CMOS drive.
Notes
Ball Signal Description Table
16-Bit CPU Bus Interface
A12, B12, A11, B11,
A10, B10, A9, B9, A8,
B8, A7, B7, A6, B6,
A5, B5
B4, B3, B2
A4
A3
A2
B1
Fast Ethernet Access Ports [7:0] MII
L13, K14, L15, L16,
N14, P14, R14, T14,
N11, P11, R11, T11,
N8, P8, R8, T8, N4,
P4, R4, T4, N1, P1,
R1, T1, J4, K3, K2,
K1, F4, F3, G2, G1
K16, T15, T12, T9, T5,
T2, L1, H1
# =
Input =
Input-ST =
Output =
I/O-TS =
pull up =
pull down =
Ball Signal Descriptions
Ball No(s)
Active low signal
Input signal
Input signal with Schmitt-Trigger
Output signal (Tri-State driver)
Input & Output signal with Tri-State driver
Weak internal pull up (refer to Section 1.4 on page 17
as some internal pull ups are not enabled in certain
configurations)
Weak internal pull down (refer to Section 1.4 on page
17 as some internal pull downs are not enabled in
certain configurations)
P_DATA[15:0]
P_A[2:0]
P_WE#
P_RD#
P_CS#
P_INT#
M[7:0]_RXD[3:0] Input
M[7:0]_CRS_DV Input
Symbol
I/O-TS
w/ pull up
Input
w/ pull up
Input
w/ pull up
Input
Input
w/ pull up
Output
w/ pull up
w/ pull up
Zarlink Semiconductor Inc.
ZL50408
I/O
12
Processor Bus Data Bit [15:0]. P_DATA[7:0] is
used in 8-bit mode.
Processor Bus Address Bit [2:0]
CPU Bus-Write Enable
CPU Bus-Read Enable
Chip Select
CPU Interrupt
Ports [7:0] – Receive Data Bit [3:0]
Ports [7:0] – Carrier Sense and Receive Data
Valid
Description
Data Sheet

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