zl50063 Zarlink Semiconductor, zl50063 Datasheet - Page 11

• Manufacturer Part Number: zl50063
• Description: 16k-channel Digital Switch With High Jitter Tolerance, Single Rate 32mbps , And 32 Inputs And 32 Output
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
Microprocessor Port Signals
Pin Name
BSTo8-15
LSTo8-15
D0 - D15
A0 - A14
LSTo0-7
LORS
CS
M5, N2, M4, M3
P5, M6, P4, N5,
C3, F1, D3, E2,
B1, B4, B5, D5,
A3, A4, C6, B6,
A5, A6, C7, B7,
N7, P7, P6, N6,
P3, P2, N3, N4,
B13, B14, D14,
C14, D12, E14,
E12, F14, G14,
G12, F12, F13,
E1, E3, F2, F3
Coordinates
A7, A8, B8
H14, G13
D13, E13
Package
(196-ball
ZL50063
PBGA)
H13
A10
Backplane Serial Output Streams 8 to 15 (5V Tolerant, Three-state
Outputs with Slew-Rate Control).
These pins output serial TDM data streams at a fixed data rate of
32.768Mbps (with 512 channels per stream).
Refer to the descriptions of the BORS and ODE pins for control of the output
HIGH or high impedance state.
Local Output Reset State (5V Tolerant Input with Internal Pull-down).
When this input is LOW, the device will initialize with the LSTo0-15 outputs
driven high. Following initialization, the Local stream outputs are always
active.
When this input is HIGH, the device will initialize with the LSTo0-15 outputs at
high impedance. Following initialization, the Local stream outputs may be set
active or high impedance using the ODE pin or on a per-channel basis with
the LE bit in the Local Connection Memory.
Local Serial Output Streams 0 to 7 (5V Tolerant Three-state Outputs with
Slew-Rate Control).
These pins output serial TDM data streams at a fixed data rate of
32.768Mbps (with 512 channels per stream).
Refer to the descriptions of the LORS and ODE pins for control of the output
HIGH or high impedance state.
Local Serial Output Streams 8 to 15 (5V Tolerant Three-state Outputs
with Slew-Rate Control).
These pins output serial TDM data streams at a fixed data rate of
32.768Mbps (with 512 channels per stream).
Refer to the descriptions of the LORS and ODE pins for control of the output
HIGH or high impedance state.
Address 0 - 14 (5V Tolerant Inputs). These pins form the 15-bit address bus
to the internal memories and registers.
A0 = LSB
Data Bus 0 - 15 (5V Tolerant Inputs/Outputs with Slew-Rate Control).
These pins form the 16-bit data bus of the microprocessor port.
D0 = LSB
Chip Select (5V Tolerant Input). Active LOW input used by the
microprocessor to enable the microprocessor port access. Note that a
minimum of 30ns must separate the de-assertion of DTA (to high) and
the assertion of CS and/or DS to initiate the next access.
Zarlink Semiconductor Inc.
ZL50063
11
Description
Data Sheet