mt90869ag2 Zarlink Semiconductor, mt90869ag2 Datasheet - Page 67
mt90869ag2
Manufacturer Part Number
mt90869ag2
Description
Flexible 16k Digital Switch F16kdx
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90869AG2.pdf
(84 pages)
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13.13.2
Address 012Dh to 014Ch
Thirty-two Backplane Output Bit Rate Registers allow the bit rate for each individual stream to be set to 2, 4, 8 or
16 Mb/s.These registers may be overridden by setting 32 Mb/s mode in the control register, in which case,
backplane streams 0-15 will operate at 32 Mb/s and backplane streams 16-31 will be unused. The BOBRR
registers are configured as follows:
13.14
Address 014Dh
The Memory BIST register enables the built-in-self-test function for the on-chip memory testing. Two consecutive
write operations are required to start MBIST. The first with only Bit 12 (LV_TM) set High (i.e., 1000h), the second
with Bit 12 maintained High but with the required start bit(s) set High.
BOBRn Bit
(for n=0 to 31)
15-2
1-0
Memory BIST Register
Backplane Output Bit Rate Registers (BOBRR0-31)
BOBR(1:0)
Table 48 - Backplane Output Bit Rate (BOBRR) Programming Table
Reserved
Name
Table 46 - Backplane Input Bit Rate (BIBR) Programming Table
Table 47 - Backplane Output Bit Rate Register (BOBRRn) Bits
BIBR1
BOBR1
0
0
1
1
0
0
1
1
Reset
0
0
BIBR0
BOBR0
0
1
0
1
Zarlink Semiconductor Inc.
0
1
0
1
Reserved
Backplane Output Bit Rate
MT90869
67
Bit rate for stream n
Bit rate for stream n
16 Mb/s
2 Mb/s
4 Mb/s
8 Mb/s
16 Mb/s
2 Mb/s
4 Mb/s
8 Mb/s
Description
Data Sheet
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