mt90869ag2 Zarlink Semiconductor, mt90869ag2 Datasheet - Page 19

• Manufacturer Part Number: mt90869ag2
• Description: Flexible 16k Digital Switch F16kdx
• Manufacturer: Zarlink Semiconductor

2.0
2.1
The device supports five switching configurations. (1) Backplane-to-Local, (2) Local-to-Backplane, (3) Backplane-
to-Backplane, (4) Local-to-Local, and (5) Uni-directional switch. The following sections describe the switching paths
in detail. Configurations (1) - (4) enable a non-blocking switch with 8192 input channels and 8192 output channels
at Backplane stream data-rates of 16.384 Mb/s or 32.768 Mb/s, and Local stream data-rates of 16.384 Mb/s. The
switch paths of Configurations (1) to (4) may be operated simultaneously.
2.1.1
The device can provide data switching between the Backplane input port and the Local output port. The Local
Connection Memory determines the switching configurations.
2.1.2
The device can provide data switching between the Local input port and the Backplane output port. The Backplane
Connection Memory determines the switching configurations.
2.1.3
The device can provide data switching between the Backplane input and output ports. The Backplane Connection
Memory determines the switching configurations.
2.1.4
The device can provide data switching between the Local input and output ports. The Local Connection Memory
determines the switching configurations.
2.1.5
The device may be optionally configured to provide a 16,384 x 16,384 uni-directional switch by grouping together
all input and all output streams. All streams may be operated at a data-rate of 16.384 Mb/s, or a combination of
16.384 Mb/s and 32.768 Mb/s. Lower data-rates may be employed with a corresponding reduction in switch
capacity.
2.2
The selection of individual stream data-rates is summarized in Table 1.
2.2.1
The local port has 32 input (LSTi0-31) and 32 output (LSTo0-31) data streams. All input and output streams may be
individually selected for operation at a data rate of either 2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s or 16.384 Mb/s. The
timing of the input and output clocks and frame pulses are shown in Figure 6, Local Port Timing Diagram for 2,4,8
and 16 Mb/s stream rates.
2.2.1.1
The bit rate for each input stream is selected by writing to a dedicated Local Input Bit Rate Register (LIBRR0-31).
Refer to Local Input Bit Rate Register (LIBRRn) Bits.
Switching Configuration
Port Data Rate Modes and Selection
Functional Description
Backplane-to-Local Path
Local-to-Backplane Path
Backplane-to-Backplane Path
Local-to-Local Path
Uni-directional Switch
Local Port Rate Selection
Local Input Port
Zarlink Semiconductor Inc.
MT90869
19
Data Sheet