mt9160bsr1 Zarlink Semiconductor, mt9160bsr1 Datasheet - Page 22

• Manufacturer Part Number: mt9160bsr1
• Description: 5v Multi-featured Phone Codec With Programmable U/a Law Companding
• Manufacturer: Zarlink Semiconductor

† AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25
* Note: RxINC, refer to Control Register 1, address 00h.
AC Characteristics
=1.843V
1
2
3
4
5
6
7
8
9
Analog output at the Codec full
scale
Absolute half-channel gain.
Din to HSPKR±
Tolerance at all other receive
filter settings (-1 to -7dB)
relative to output at 0 dB setting
Gain tracking vs. input level
ITU-T G.714 Method 2
Signal to total distortion vs. input
level.
ITU-T G.714 Method 2
Receive Idle Channel Noise
Gain relative to gain at 1020 Hz
200 Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
Absolute Delay
Group Delay relative to D
Crosstalk
rms
for A-Law, at the Codec. (V
Characteristics
†
°
C and are for design aid only: not guaranteed and not subject to production testing.
for D/A (Receive) Path
A/D to D/A
D/A to A/D
AR
Ref
=0.6 volts and V
A
A
Sym.
CT
CT
G
G
G
G
G
N
G
D
Lo3.17
Lo3.14
G
N
D
AR1
AR2
AR3
AR4
QR
CR
PR
RR
AR
DR
TR
RT
TR
Zarlink Semiconductor Inc.
- 0 dBm0 = A
MT9160B/61B
Bias
=2.5 volts.)
-12.8
-0.25
-0.90
Min.
-0.8
-6.8
-6.8
-0.2
-0.3
-0.6
-1.6
35
29
24
22
Lo3.17
7.225
7.481
Typ.
±0.1
240
750
380
130
750
-12
-84
-6
-6
0
7
- 3.17 dB = 1.773V
‡
Max.
-11.2
-12.5
+0.2
0.25
0.25
0.25
-5.2
-5.2
-80
-25
-74
-80
0.8
0.3
0.6
1.6
10
dBrnC0
dBm0p
Units
rms
Vp-p
Vp-p
ms
ms
ms
ms
ms
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
for µ-Law and 0 dBm0 = A
µ-Law
A-Law
DrGain=0, RxINC =1*
DrGain=0, RxINC =0*
DrGain=1, RxINC =1*
DrGain=1, RxINC =0*
@ 1020 Hz
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
0 to -30 dBm0
-40 dBm0
-45 dBm0
µ-Law
A-Law
at frequency of min. delay
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
G.714.16
ITU-T
Test Conditions
Data Sheet
Lo3.14
- 3.14 dB