ml86v7667 Oki Semiconductor, ml86v7667 Datasheet - Page 22

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ml86v7667

Manufacturer Part Number
ml86v7667
Description
Ntsc/pal Digital Video Decoder
Manufacturer
Oki Semiconductor
Datasheet

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Active Pixel Timing
Note: Where the FIFO mode is used in asynchronous sampling operations with fixed clock, the 1-field sampling
OKI Semiconductor
NTSC
Video
mode
Composite
Signal
HSYNC_L
HVALID
PAL
error accumulated in the line immediately following the fall of VVALID is reset. Therefore, the pixel count
for the line that was reset will change. In addition, where the condition of VTR and other signals is poor in
the FIFO-2 mode, the FIFO reset line might break in before the fall of VVALID.
Square pixel
Square pixel
Pixel mode
Sampling
ITUR.601
ITUR.601
Front porch
4fsc
Video Modes and Pixel/Line Counts (at Standard Signal Input)
12.272727
Pixel rate
14.31818
Note: Actually, there is an output delay of about 1H after video signal input.
Output
(MHz)
14.75
Back porch
13.5
13.5
H blank
Hsync
porch
Front
16
22
16
14
34
Hsync
porch
Back
Total pixels (HSYNC_L)
122
118
126
130
142
Active pixels (HVALID)
Active Field
Total pixels
Active pixels
H blank
138
140
142
144
176
H
Active
pixels
720
640
768
720
768
pixels
Total
858
780
910
864
944
Even/20
Even/24
V blank
Odd/20
Odd/23
Total lines
(VSYNC_L)
Active lines
(VVALID)
60 pixels
Even/242
Even/289
Odd/243
Odd/289
Active
lines
PEDL86V7667-00
V
ML86V7667
Even/262
Even/313
Odd/263
Odd/312
Total
lines
22/31

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