wm8152scds-v Wolfson Microelectronics plc, wm8152scds-v Datasheet
wm8152scds-v
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wm8152scds-v Summary of contents
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... PGA AGND1 AGND2 at http://www.wolfsonmicro.com/enews/ WM8152 DVDD2 VRT VRX VRB VREF/BIAS 16- DATA BIT I/O + ADC PORT I/P SIGNAL POLARITY ADJUST W WM8152 CONFIGURABLE SERIAL CONTROL INTERFACE DGND Production Data, August 2008, Rev 4.3 Copyright ©2008 Wolfson Microelectronics plc OP[0] OP[1] OP[2] OP[3]/SDO SEN SCK SDI ...
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WM8152 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 THERMAL PERFORMANCE .................................................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 INPUT VIDEO SAMPLING ............................................................................................. 8 OUTPUT ...
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... Production Data PIN CONFIGURATION AGND2 1 DVDD1 2 VSMP 3 MCLK 4 DGND 5 WM8152 SEN 6 DVDD2 7 SDI 8 SCK 9 OP[0] 10 ORDERING INFORMATION TEMPERATURE DEVICE RANGE WM8152SCDS WM8152SCDS/ Note: Reel quantity = 2,000 w 20 VINP 19 VRLC/VBIAS 18 VRX 17 VRT 16 VRB 15 AGND1 14 AVDD 13 OP[3]/SDO 12 OP[2] 11 OP[1] PACKAGE 20-lead SSOP o C ...
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WM8152 PIN DESCRIPTION PIN NAME TYPE 1 AGND2 Supply 2 DVDD1 Supply 3 VSMP Digital input 4 MCLK Digital input 5 DGND Supply 6 SEN Digital input 7 DVDD2 Supply 8 SDI Digital input 9 SCK Digital input 10 OP[0] ...
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Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical ...
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WM8152 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions) Full-scale input voltage range (see Note 1) Input signal ...
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Production Data Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Programmable Gain Amplifier Resolution Gain equation Max gain Min gain Gain error Internal channel offset Analogue to Digital Converter Resolution Maximum ...
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WM8152 INPUT VIDEO SAMPLING t MCLK t VSMPSU VSMP INPUT VIDEO Figure 1 Input Video Timing Note: 1. See Page 15 (Programmable VSMP Detect Circuit) for video sampling description. Test Conditions VDD = 5.0V, DVDD = 3.3V, AGND = DGND ...
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Production Data SERIAL INTERFACE t SPER SCK t t SSU SH SDI SEN SDO Figure 3 Serial Interface Timing Test Conditions VDD = 5.0V, DVDD = 3.3V, AGND = DGND = 0V, T PARAMETER SCK period SCK high SCK low ...
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WM8152 INTERNAL POWER ON RESET CIRCUIT Figure 4 Internal Power On Reset Circuit Schematic The WM8152 includes an internal Power-On-Reset Circuit, as shown in Figure 4, which is used to reset the digital logic into a default state after power ...
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Production Data Figure 6 Typical Power up Sequence where DVDD1 is Powered before AVDD Figure 6 shows a typical power-up sequence where DVDD1 is powered up first assumed that DVDD1 is already up to specified operating voltage. When ...
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WM8152 DEVICE DESCRIPTION INTRODUCTION A block diagram of the device showing the signal path is presented on Page 1. The WM8152 processes the sampled video signal on VINP with respect to the video reset level or an internally/externally generated reference ...
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Production Data EXTERNAL VRLC Figure 7 Reset Level Clamping and CDS Circuitry Reset Level Clamping is controlled by register bit RLCINT. Figure 8 illustrates the effect of the RLCINT bit for a typical CCD waveform, with CL applied during the ...
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WM8152 R /CL (CDSREF = 00 /CL (CDSREF = 01 /CL (CDSREF = 10 /CL (CDSREF = 11) S Figure 9 Reset Sample and Clamp Timing For CIS type sensor signals, non-CDS processing is ...
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Production Data ADC INPUT BLACK LEVEL ADJUST The output from the PGA should be offset to match the full-scale range of the ADC (V negative-going input video signals, a black level (zero differential) output from the PGA should be offset ...
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WM8152 INPUT SAMPLING BLOCK: INPUT SAMPLING AND REFERENCING If CDS = 1, (i.e. CDS operation) the previously sampled reset level, V input video. If CDS = 0, (non-CDS operation) the simultaneously sampled voltage on pin VRLC is subtracted instead. If ...
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Production Data OUTPUT DATA FORMAT The digital data output from the ADC is available to the user in 4-bit wide multiplexed. Latency of valid output data with respect to VSMP is programmable by writing to control bits DEL[1:0]. The latency ...
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WM8152 CONTROL INTERFACE The internal control registers are programmable via the serial digital control interface. The register contents can be read back via the serial interface on pin OP[3]/SDO. Note recommended that a software reset is carried out ...
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Production Data PROGRAMMABLE VSMP DETECT CIRCUIT The VSMP input is used to determine the sampling point and frequency of the WM8152. Under normal operation a pulse of 1 MCLK period should be applied to VSMP at the desired sampling frequency ...
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WM8152 REFERENCES The ADC reference voltages are derived from an internal bandgap reference, and buffered to pins VRT and VRB, where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and also requires decoupling. The ...
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Production Data OPERATING MODE TIMING DIAGRAMS The following diagrams show 4-bit multiplexed output data and MCLK, VSMP and input video requirements for operation of the most commonly used modes as shown in Table 4. The diagrams are identical for both ...
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WM8152 MCLK VSMP VINP OP[3: (DEL = 00) OP[3: (DEL = 01) OP[3: ...
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Production Data DEVICE CONFIGURATION REGISTER MAP The following table describes the location of each control bit used to determine the operation of the WM8152. The register map is programmed by writing the required codes to the appropriate addresses via the ...
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WM8152 REGISTER MAP DESCRIPTION The following table describes the function of each of the control bits shown in Table 5. REGISTER BIT BIT NO NAME(S) Setup 0 EN Register 1 1 CDS 3:2 Reserved 5:4 PGAFS[1:0] 6 MODE3 7 Reserved ...
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Production Data REGISTER BIT BIT NO NAME(S) Setup 0 VSMPDET Register 5 3:1 VDEL[2:0] 4 POSNNEG 7:5 Reserved Test 7 TCLK Register 1 Offset DAC 7:0 DACR[7:0] (Red) Offset DAC 7:0 DACG[7:0] (Green) Offset DAC 7:0 DACB[7:0] (Blue) Offset DAC ...
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WM8152 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS DVDD2 DVDD1 C1 C2 AVDD DGND DGND AGND Video Input AGND Timing Signals Interface Controls NOTES: 1. C1-9 should be fitted as close to WM8152 as possible. 2. AGND and DGND should be connected ...
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Production Data PACKAGE DIMENSIONS DS: 20 PIN SSOP (7.2 x 5.3 x 1.75 mm Dimensions Symbols (mm) MIN NOM A ----- A 0. 1.65 1. 0.22 c 0.09 D ...
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... WM8152 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...