ml7051la Oki Semiconductor, ml7051la Datasheet - Page 5

• Manufacturer Part Number: ml7051la
• Description: Bluetooth Baseband Controller Ic
• Manufacturer: Oki Semiconductor

CLK and Configuration
Memory I/F
1 Semiconductor
SCLKSEL
Pin Name
Pin Name
BBWSEL
REMAP0
REMAP1
MA[19:0]
MD[15:0]
RESETn
SCLK12
MOEn0
MOEn1
[*1]
[*2]
MCSn0
MCSn1
MBSn0
MBSn1
MWAIT
MWEn
MREn
XCLK
MA19: H3; MA18: H4;
MA13: K2; MA12: J1;
MA6: M1;
MD15: N5; MD14: K5;
MD9: K7;
MD2: K9;
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Pull Up/Down
Pull Up/Down
MA5: N2;
MD8: N7;
MD1: M10;
Pull down
Internal
Internal
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MA17: H2;
MA11: J3;
MA4: L3;
MD13: M5;
MD7: L8;
MD0: L10
Value
Value
Initial
Initial
—
—
—
—
—
—
—
H
H
H
H
H
H
H
H
L
Z
Placement
Placement
MA16: J2;
MA10: K1;
MA3: N3;
MD12: N6;
MD6: K8;
M11
M12
E12
E13
A11
C13
C10
A12
B13
N10
K10
N11
N12
K11
L11
[*1]
[*2]
Pin
Pin
F3
Master clock (12 MHz) input pin
(Power level: CMOS level)
User clock input pin
System clock select pin
L: Select CLK divided by internal PLL
H: Select XCLK input signal
Hardware reset pin (Reset = L)
BANK0 region bit width select pin
L: 8-bit
H: 16-bit
REMAP select pin during boot up
REMAP[1:0] = “00” Reserved
External address bus
External data bus
External write enable signal output
External read enable signal output
External RAM space chip select
External I/O space chip select
External lower byte select
External upper byte select
External MCS[0] device output enable
(MCSn0 and WREn OR output)
External MCS[1] device output enable
(MCSn1 and WREn OR output)
External wait signal input
(Pin shared with GPIO1)
MA15: H1; MA14: J4
MA9: L2;
MA2: L4;
MD11: M6; MD10: M7
MD5: M8;
“01” Stacked Flash ROM
“10” External MCS[1] device
“11” External MCS[0] device
Description
Description
MA8: K4;
MA1: M3;
MD4: M9;
FEDL7051LA-02
ML7051LA
MA0: L5
MD3: N8;
MA7: M2
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