ml7051la Oki Semiconductor, ml7051la Datasheet - Page 12

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ml7051la

Manufacturer Part Number
ml7051la
Description
Bluetooth Baseband Controller Ic
Manufacturer
Oki Semiconductor
Datasheet
SIO Block
µPLAT-SIO Block
PCM-CVSD Transcoder Block
GPIO Block
1 Semiconductor
UART/Synchronous type serial port interface
UART Mode:
- Data length: can be selected as 7 or 8 bits
- Supports odd parity, even parity, or no parity
- Error servicing for parity, overrun, and framing errors
- Supports 1 or 2 stop bits
- Full-duplex communication is possible
Clock synchronization mode:
- Data length: can be selected as as 7 or 8 bits
- Error servicing for overrun errors
- Full-duplex communication is possible
Start-stop synchronization type serial port interface
Built-in dedicated baud rate generator
Data length of 7 or 8 bits can be selected
1 or 2 stop bits can be selected.
Supports odd or even parity
Error servicing for parity, overrun, and framing errors
Full-duplex communication is possible
Application side I/O:
- PCM Codec
- APB-Bus (USB)
Application-side format:
- PCM linear (8, 16 bits/sample, 64 kHz sampling frequency)/A-law/ -law
Bluetooth-side format:
- CVSD/A-law/ -law
All combinations of the above conversions are supported
PCMSYMC/PCMCLK I/O can be switched (in the input state after initialization)
All 16 bits
Input/Output selection possible for each bit
Interrupts can be used for all 16 bits
Interrupt masks and interrupt modes can be set for all bits
In the input state immediately after a reset
FEDL7051LA-02
ML7051LA
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