ml7051la Oki Semiconductor, ml7051la Datasheet - Page 13

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ml7051la

Manufacturer Part Number
ml7051la
Description
Bluetooth Baseband Controller Ic
Manufacturer
Oki Semiconductor
Datasheet
APPLICATION NOTES
Operation During Boot Up
Clock Selection
HCI Transport Selection
1 Semiconductor
Remapping during boot up is performed according to external pins REMAP[1:0].
Bit width that corresponds to BANK0 during boot up is set according to external pin BBWSEL.
BBWSEL = L : 8-bit
BBWSEL = H : 16-bit
The CPU clock supply source is selected according to external pin SCLKSEL.
SCLKSEL = L : Use 32/16/8/4 MHz clock that was divided down from the internal PLL output of 192 MHz
SCLKSEL = H : Use external pin XCLK.
Note: The clock supply source can also be set by the CLKCNT register in the CTL/WDT block.
Bluetooth transmission clock is selected according to external pin TXCSEL.
TXCSEL = L : Use 1 MHz clock that was divided down from the internal PLL output (192 MHz).
TXCSEL = H : Use external pin TXC_IN.
Note: This clock can also be set by the CLKCNT register in the CTL/WDT block.
HCI is selected (USB/UART) according to the logical value of GPIO0 at initial powerup of ML7051LA.
GPIO0 = L
GPIO0 = H
REMAP1
L
L
H
H
: UART is used as HCI.
: USB is used as HCI.
that was generated from external pin SCLK12 (12 MHz). (Initial value is 32 MHz.)
REMAP0
L
H
L
H
:
:
:
:
Reserved
Stack Flash ROM
Devices connected to external MCS[1]
Devices connected to external MCS[0]
FEDL7051LA-02
ML7051LA
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