wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 39

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wm8400

Manufacturer Part Number
wm8400
Description
Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
Manufacturer
Wolfson Microelectronics plc
Datasheet
w
Pre-Production
CONTROL INTERFACE
The WM8400 is controlled by writing to its control registers. Readback is available for certain
registers, including device ID, power management registers and some GPIO status bits. The control
interface can operate as either a 2-wire or 3-wire control interface, with additional variants as detailed
below:
1.
2.
Readback is provided on the bi-directional pin SDIN in 2-wire and 3-wire modes.
CONTROL INTERFACE POWER DOMAIN
Operation of the Control Interface requires an appropriate power supply to be connected to the
I2CVDD power domain. This supply is referenced to GND.
The operating range for this supply is detailed in the “Recommended Operating Conditions” section.
If the I2C bus is shared in an application with other devices, the I2CVDD must be supplied to the
Wolfson device at all times the bus is active.
SELECTION OF CONTROL MODE
The MODE pin determines the 2-wire or 3-wire mode as shown in Table 2.
Table 2 Control Interface Mode Selection
2-WIRE SERIAL CONTROL MODE
The WM8400 is controlled by writing to registers through a 2-wire serial control interface. A control
word consists of 24 bits. The first 8 bits (B23 to B16) are address bits that select which control
register is accessed. The remaining 16 bits (B15 to B0) are data bits, corresponding to the 16 bits in
each control register. Many devices can be controlled by the same bus, and each device has a
unique 7-bit address (this is not the same as the 8-bit address of each register in the WM8400). The
default device address is 0011000 (0x30h)
The WM8400 operates as a slave device only. The controller indicates the start of data transfer with
a high to low transition on SDIN while SCLK remains high. This indicates that a device address and
data will follow. All devices on the 2-wire bus respond to the start condition and shift in the next eight
bits on SDIN (7-bit address + Read/Write bit, MSB first). If the device address received matches the
address of the WM8400, then the WM8400 responds by pulling SDIN low on the next clock pulse
(ACK). If the address is not recognised or the R/W bit is ‘1’ when operating in write only mode, the
WM8400 returns to the idle condition and wait for a new start condition and valid address.
The WM8400 supports a multitude of read and write operations, which are:
2-wire
- open-drain
3-wire
- push 0/1
- open drain
Single write
Single read
Multiple write using auto-increment
Multiple read using auto-increment
MODE
High
Low
INTERFACE FORMAT
3- wire
2 wire
PP, April 2009, Rev 3.0
WM8400
39

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