ak4141 AKM Semiconductor, Inc., ak4141 Datasheet - Page 30

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ak4141

Manufacturer Part Number
ak4141
Description
Nicam/a2/eia-j Digital Stereo Decoder
Manufacturer
AKM Semiconductor, Inc.
Datasheet
The AK4141 supports fast-mode I
1. Data transfer
All commands are preceded by a START condition. After the START condition, a slave address is sent. After the
AK4141 recognizes the START condition, the device interfaced to the bus waits of the slave address to be transmitted
over the SDA line. If the transmitted slave address matches an address for one of the devices, the designated slave device
pulls the SDA line to LOW (ACKNOWLEDGE). The data transfer is always terminated by a STOP condition generated
by the master device.
1-1. Data validity
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state of the data line
can only be changed when the clock signal on the SCL line is LOW except for the START and the STOP condition.
1-2. START and STOP condition
A HIGH to LOW transition on the SDA line while SCL is HIGH indicates a START condition. All sequences start from
the START condition.
A LOW to HIGH transition on the SDA line while SCL is HIGH defines a STOP condition. All sequences end by the
STOP condition.
MS0952-E-00
Serial Control Interface
SCL
SDA
SCL
SDA
START CONDITION
2
C-bus system (max: 400kHz).
Figure 19. START and STOP conditions
DATA VALID
DATA LINE
STABLE :
Figure 18. Data transfer
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CHANGE
OF DATA
ALLOWED
STOP CONDITION
[AK4141]
2008/05

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