ak4620b AKM Semiconductor, Inc., ak4620b Datasheet - Page 28

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ak4620b

Manufacturer Part Number
ak4620b
Description
24-bit 192khz Audio Codec With Ipga
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
The internal registers may be written to the 3-wire µP interface pins: CSN, CCLK, CDTI. The data on this interface
consists of Chip address (2bits, C0/1) Read/Write (1 bit), Register address (MSB first, 5 bits) and Control data (MSB first,
8 bits). Address and data is clocked in on the rising edge of CCLK. Data is latched out after the 16th rising edge of CCLK,
following a high-to-low transition of CSN. Operation of the control serial port may be completely asynchronous with the
audio sample rate. The maximum clock speed of the CCLK is 5MHz. The chip address is fixed to “10”. The access to the
chip address except for “10” is invalid. PDN pin = “L” resets the registers to their default values.
* READ command is not supported.
* The control data can not be written when the CCLK rising edge is 15times or less or 17times or more during CSN is “L”.
MS0401-E-00
Serial Control Interface
CSN
CCLK
CDTI
Function
ADC Single-ended/Differential Input mode
Overflow detection
Zero detection
Soft Mute
Input Volume
Output Volume
HPF OFF
DSD mode
16/20/24 bit LSB justified format of DAC
MCLK = 256fs @ Quad Speed
De-emphasis: 32kHz, 48kHz
C1 C0
0
Table 17. Function List (X: available, -: not available)
1
C1-C0:
R/W:
A4-A0:
D7-D0:
R/W
2
A4
3
Figure 13. Control I/F Timing
A3
Chip A ddress (Fixed to “10”)
READ/WRITE (Fixed to “1”:WRITE)
Register Address
Cont rol data
4
A2
5
A1 A0
6
- 28 -
7
D7 D6 D5 D4 D3 D2 D1 D0
8
Parallel mode
9
10 11 12 13 14 15
X
X
-
-
-
-
-
-
-
-
-
Serial mode
X
X
X
X
X
X
X
X
X
X
X
[AK4620B]
2005/07

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