ak4620b AKM Semiconductor, Inc., ak4620b Datasheet - Page 12

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ak4620b

Manufacturer Part Number
ak4620b
Description
24-bit 192khz Audio Codec With Ipga
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Parameter
Master Clock Timing
Frequency
LRCK Frequency
PCM Audio Interface Timing
DSD Audio Interface Timing
ASAHI KASEI
(Ta=25°C; VA=4.75 ∼ 5.25V; VD=3.0 ∼ 3.6V, VT=3.0 ∼ 5.25V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage (Iout=-100µA)
Low-Level Output Voltage (Iout=100µA)
Input Leakage Current
(Ta=25°C; VA=4.75 ∼ 5.25V; VD=3.0 ∼ 3.6V, VT=3.0 ∼ 5.25V; C
Note 22. When the normal/double/quad speed modes are switched, the AK4620B should be reset by PDN pin or RSTN
Note 23. BICK rising edge must not occur at the same time as LRCK edge.
Note 24. DSD data transmitting device must meet this time.
MS0401-E-00
Pulse Width Low
Pulse Width High
Normal Speed Mode (DFS0=“0”, DFS1=”0”)
Double Speed Mode (DFS0=“1”, DFS1=”0”)
Quad Speed Mode (DFS0=“0”, DFS1=”1”)
Duty Cycle
BICK Period
BICK Pulse Width Low
LRCK Edge to BICK “↑”
BICK “↑” to LRCK Edge
LRCK to SDTO (MSB) (Except I
BICK “↓” to SDTO
SDTI Hold Time
SDTI Setup Time
DCLK Period
DCLK Pulse Width Low
DCLK Edge to DSDL/R
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Pulse Width High
bit.
Pulse Width High
(Note 23)
(Note 23)
(Note 24)
2
S mode)
(Note 22)
SWITCHING CHARACTERISTICS
DIGITAL CHARACTERISTICS
Symbol
tBCKH
tDCKH
tCLKH
tBCKL
tDCKL
tCLKL
tDDD
fCLK
tBCK
tBCK
tBCK
tDCK
tLRB
tBLR
tBSD
tSDH
tLRS
tSDS
Symbol
fsn
fsd
fsq
- 12 -
VOH
VOL
VIH
VIL
Iin
L
0.4/fCLK
0.4/fCLK
1/128fsn
=20pF)
1/64fsd
1/64fsq
1/64fs
8.192
70%VD
min
VD-0.5
108
160
160
-20
32
54
45
33
33
20
20
20
20
min
-
-
-
typ
typ
-
-
-
-
-
55.296
max
108
216
54
55
20
20
20
30%VD
max
±10
VT
0.5
-
[AK4620B]
2005/07
Units
MHz
kHz
kHz
kHz
Units
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µA
V
V
V
V

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