ep1m120 Altera Corporation, ep1m120 Datasheet - Page 38
ep1m120
Manufacturer Part Number
ep1m120
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP1M120.pdf
(86 pages)
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Mercury Programmable Logic Device Family Data Sheet
38
The ESB implements two forms of clocking modes for quad-port and
dual-port memory—read/write clock mode and input/output clock
mode.
Read/Write Clock Mode
An ESB implementing quad-port memory in read/write clock mode can
use up to four clocks. For port A, one clock controls all registers associated
with writing: data input, WE, and write address. The other clock controls
all registers associated with reading: read enable (RE), read address, and
data output. Another set of clocks can be used for port B of the RAM, or
the same clocks can be used. Each ESB port, A or B, also supports
independent read clock enable, write clock enable, and asynchronous
clear signals. Read/write clock mode is commonly used for applications
where reads and writes occur at different system frequencies.
shows the ESB in read/write clock mode.
Altera Corporation
Figure 19