ep1m120 Altera Corporation, ep1m120 Datasheet - Page 34

• Manufacturer Part Number: ep1m120
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Mercury Programmable Logic Device Family Data Sheet
Notes to
(1)
(2)
(3)
(4)
Embedded
System Block
34
LE
Local
Interconnect
IOE
ESB Row
Interconnect
ESB
Row
Priority Row
RapidLAB
Interconnect
Column
Priority
Column
Leap Lines
Table 9. Mercury Routing Scheme
Source
This direct connection is possible through the FastLUT connection.
IOEs can connect to the adjacent LAB’s local interconnects in the associated LAB row.
IOEs can connect to row and priority row interconnects in the associated LAB row.
This connection is used for multiplier mode.
Table
v
v
v
9:
(1)
(4)
LE
Interconnect
v
Local
v
v
v
v
(2)
Table 9
drive each other.
The ESB can implement various types of memory blocks, including quad-
port, true dual-port, dual- and single-port RAM, ROM, FIFO, and CAM
blocks.
The ESB includes input and output registers; the input registers
synchronize reads and/or writes, and the output registers can pipeline
designs to further increase system performance. The ESB offers a quad
port mode, which supports up to four port operations, two reads and two
writes simultaneously, with the ability for a different clock on each of the
four ports.
IOE
v
summarizes how various elements of the Mercury architecture
Interconnect
ESB Row
Figure 17
v
v
v
v
ESB Row Priority
v
shows the ESB quad-port block diagram.
Destination
v
v
v
v
(3)
v
Row
v
v
v
v
(3)
Interconnect
RapidLAB
v
v
v
Column Priority
v
v
v
v
v
v
Altera Corporation
Column
v
v
v
v
Lines
Leap
v
v