cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 215

• Manufacturer Part Number: cp3cn23
• Description: Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
• Manufacturer: National Semiconductor Corporation

28.5
All output signals are powered by the digital supply (VCC).
Table 73 summarizes the states of the output signals during
the reset state (when VCC power exists in the reset state)
and during the Power Save mode.
28.6
(Guaranteed by design. All timing except memory interface characterized not tested for production.)
PB7:0
PC7:0
PE5:0
PF7:0
PG7:0
PH7:0
PJ7:0
Symbol Figure
t
t
t
t
t
t
t
t
RST
X1p
X1h
X2p
X2h
t
X1l
X2l
t
IW
IH
R
a. Only when operating with an external square wave on X2CKI; otherwise a 32 kHz crystal network must be
Signals on a Pin
used between X2CKI and X2CKO. If Slow Clock is internally generated from Main Clock, it may not exceed
this given limit.
OUTPUT SIGNAL LEVELS
CLOCK AND RESET TIMING
92
92
92
92
92
92
93
93
94
94
X1 period
X1 high time, external clock
X1 low time, external clock
X2 period
X2 high time, external clock
X2 low time, external clock
Input hold time (NMI, RXD1, RXD2)
NMI Pulse Width
RESET Pulse Width
Vcc Rise Time
a
Description
Table 73 Output Pins During Reset and Power-Save
TRI-STATE
TRI-STATE
TRI-STATE
TRI-STATE
TRI-STATE
TRI-STATE
TRI-STATE
Reset State
(with Vcc)
Table 74 Clock and Reset Signals
Reset and NMI Input Signals
Clock Input Signals
Previous state
Previous state
Previous state
Previous state
Previous state
Previous state
Previous state
Power Save Mode
Rising Edge (RE) on X1 to
next RE on X1
At 2V level (Both Edges)
At 0.8V level (Both Edges)
RE on X2 to next RE on X2
At 2V level (both edges)
At 0.8V level (both edges)
After RE on CLK
NMI Falling Edge (FE) to
RE
RESET FE to RE
0.1 Vcc to 0.9 Vcc
215
The RESET and NMI input pins are active during the Power
Save mode. In order to guarantee that the Power Save cur-
rent not exceed 1 mA, these inputs must be driven to a volt-
age lower than 0.5V or higher than VCC - 0.5V. An input
voltage between 0.5V and (VCC - 0.5V) may result in power
consumption exceeding 1 mA.
Reference
I/O ports will maintain their values when
entering power-save mode
(0.5 Tclk) - 500
(0.5 Tclk) - 500
(0.5 Tclk) - 5
(0.5 Tclk) - 5
Min (ns)
10,000
83.33
100
20
Comments
0
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Max (ns)
83.33