cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 152

• Manufacturer Part Number: cp3cn23
• Description: Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
• Manufacturer: National Semiconductor Corporation

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21.5
Software interacts with the Microwire interface by accessing
the Microwire registers. There are three such registers:
21.5.1
The MWDAT register is a word-wide, read/write register
used to transmit and receive data through the MDODI and
MDIDO pins. The register format is shown below.
Figure 72 shows the hardware structure of the register.
Read
Write
DIN
7
MWCTL1
MWSTAT
MWDAT
Name
Table 64 Microwire Interface Registers
Microwire Data Register (MWDAT)
MICROWIRE INTERFACE REGISTERS
MWDAT
Read Buffer
Figure 72. MWDAT Register
(Low Byte)
(Low Byte)
Shifter
FF F3A0h
FF F3A2h
FF F3A4h
Address
MWDAT
Read Buffer
(High Byte)
(High Byte)
Shifter
Microwire Control
Microwire Status
Microwire Data
Description
Register
Register
Register
MOD
1
0
DS074
DOUT
0
152
21.5.2
The MWCTL1 register is a word-wide, read/write register
used to control the Microwire module. To avoid clock glitch-
es, the MWEN bit must be clear while changing the states
of any other bits in the register. At reset, all non-reserved
bits are cleared. The register format is shown below.
MWEN
MNS
MOD
ECHO
SCM
15
7
EIW
MICROWIRE Control Register (MWCTL1)
6
The Microwire Enable bit controls whether the
Microwire interface module is enabled.
0 – Microwire module disabled.
1 – Microwire module enabled.
Clearing this bit disables the module, clears
the status bits in the Microwire status register
(the BSY, RBF, and OVR bits in MWSTAT),
and places the Microwire interface pins in the
states described below.
The Master/Slave Select bit controls whether
the CP3CN23 is a master or slave. When
clear, the device operates as a slave. When
set, the device operates as the master.
0 – CP3CN23 is slave.
1 – CP3CN23 is master.
The Mode Select bit controls whether 8- or 16-
bit mode is used. When clear, the device op-
erates in 8-bit mode. When set, the device op-
erates in 16-bit mode. This bit must only be
changed when the module is disabled or idle
(MWSTAT.BSY = 0).
0 – 8-bit mode.
1 – 16-bit mode.
The Echo Back bit controls whether the echo
back function is enabled in slave mode. This
bit must be written only when the Microwire in-
terface is idle (MWSTAT.BSY=0). The ECHO
bit is ignored in master mode. The MWDAT
register is valid from the time the register has
been written until the end of the transfer. In the
echo back mode, MDODI is transmitted (ech-
oed back) on MDIDO if the MWDAT register
does not contain any valid data. With the echo
back function disabled, the data held in the
MSK
MWCS
MDIDO
MDODI
EIR
5
Pin
SCDV
EIO
4
ECHO MOD
Master – SCIDL Bit
Slave – Input
Input
Master – Input
Slave – TRI-STATE
Master – Known value
Slave – Input
3
State When Disabled
2
MNS MWEN
9
1
SCIDL
8
0